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LM3S8938-IGZ80-A2 Datasheet(PDF) 4 Page - Texas Instruments |
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LM3S8938-IGZ80-A2 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 621 page 6.1.2 Reset Control ................................................................................................................ 69 6.1.3 Power Control ............................................................................................................... 72 6.1.4 Clock Control ................................................................................................................ 74 6.1.5 System Control ............................................................................................................. 79 6.2 Initialization and Configuration ....................................................................................... 80 6.3 Register Map ................................................................................................................ 81 6.4 Register Descriptions .................................................................................................... 82 7 Hibernation Module .............................................................................................. 137 7.1 Block Diagram ............................................................................................................ 138 7.2 Functional Description ................................................................................................. 138 7.2.1 Register Access Timing ............................................................................................... 138 7.2.2 Clock Source .............................................................................................................. 139 7.2.3 Battery Management ................................................................................................... 140 7.2.4 Real-Time Clock .......................................................................................................... 140 7.2.5 Non-Volatile Memory ................................................................................................... 141 7.2.6 Power Control ............................................................................................................. 141 7.2.7 Initiating Hibernate ...................................................................................................... 141 7.2.8 Interrupts and Status ................................................................................................... 142 7.3 Initialization and Configuration ..................................................................................... 142 7.3.1 Initialization ................................................................................................................. 142 7.3.2 RTC Match Functionality (No Hibernation) .................................................................... 142 7.3.3 RTC Match/Wake-Up from Hibernation ......................................................................... 143 7.3.4 External Wake-Up from Hibernation .............................................................................. 143 7.3.5 RTC/External Wake-Up from Hibernation ...................................................................... 143 7.4 Register Map .............................................................................................................. 143 7.5 Register Descriptions .................................................................................................. 144 8 Internal Memory ................................................................................................... 157 8.1 Block Diagram ............................................................................................................ 157 8.2 Functional Description ................................................................................................. 157 8.2.1 SRAM Memory ............................................................................................................ 157 8.2.2 Flash Memory ............................................................................................................. 158 8.3 Flash Memory Initialization and Configuration ............................................................... 159 8.3.1 Flash Programming ..................................................................................................... 159 8.3.2 Nonvolatile Register Programming ............................................................................... 160 8.4 Register Map .............................................................................................................. 161 8.5 Flash Register Descriptions (Flash Control Offset) ......................................................... 162 8.6 Flash Register Descriptions (System Control Offset) ...................................................... 170 9 General-Purpose Input/Outputs (GPIOs) ........................................................... 183 9.1 Functional Description ................................................................................................. 183 9.1.1 Data Control ............................................................................................................... 184 9.1.2 Interrupt Control .......................................................................................................... 185 9.1.3 Mode Control .............................................................................................................. 186 9.1.4 Commit Control ........................................................................................................... 186 9.1.5 Pad Control ................................................................................................................. 186 9.1.6 Identification ............................................................................................................... 187 9.2 Initialization and Configuration ..................................................................................... 187 9.3 Register Map .............................................................................................................. 188 9.4 Register Descriptions .................................................................................................. 190 June 22, 2010 4 Texas Instruments-Production Data Table of Contents |
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