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SN74LVC373ADGVRG4 Datasheet(PDF) 3 Page - Texas Instruments |
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SN74LVC373ADGVRG4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 28 page www.ti.com OE To Seven Other Channels 1 11 3 2 LE 1D C1 1D 1Q Pin numbers shown are for the DB, DGV, DW, FK, J, N, NS, PW, RGY, and W packages. Absolute Maximum Ratings (1) SN54LVC373A, SN74LVC373A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS295S – JANUARY 1993 – REVISED MAY 2005 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range(2) –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state(2)(3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through VCC or GND ±100 mA DB package(4) 70 DGV package(4) 92 DW package(4) 58 GQN/ZQN package(4) 78 θ JA Package thermal impedance °C/W N package(4) 69 NS package(4) 60 PW package(4) 83 RGY package(5) 37 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of VCC is provided in the recommended operating conditions table. (4) The package thermal impedance is calculated in accordance with JESD 51-7. (5) The package thermal impedance is calculated in accordance with JESD 51-5. 3 |
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