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BA6486FS Datasheet(PDF) 4 Page - Rohm

Part # BA6486FS
Description  FDD spindle motor driver
Download  11 Pages
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Manufacturer  ROHM [Rohm]
Direct Link  http://www.rohm.com
Logo ROHM - Rohm

BA6486FS Datasheet(HTML) 4 Page - Rohm

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547
Motor driver ICs
BA6486FS
FCircuit operation
(1)
Motor drive circuit
The motor driver is based on a 3-phase, full-wave soft
switching, current drive system in which the position of
rotor is sensed by Hall elements. The total drive current
of motor is sensed by a small resistor (RNF) and regulated
through a voltage comparison. The IC consists of Hall
amplifiers, an amplitude control circuit, a driver, an error
amplifier, and current feedback ampifier (Fig. 1).
The waveforms of different steps along the signal path
from the Hall elements to the motor driver output are
shown in Fig. 2. The Hall amplifiers receive the Hall ele-
ments voltage signals as differential signals. Next, by de-
ducting the voltage signal of Hall elements 2 from the
voltage signal of Hall elements 1, current signal H1,
which has a phase 30 degrees ahead of Hall element 1,
is created. Current signals H2 and H3 are created like-
wise. The amplitude control circuit then amplifies the H1,
H2, and H3 signal according to the current feedback am-
plifier signal. Then, drive current signals are produced at
A1, A2, and A3 by applying a constant magnification fac-
tor. Because a soft switching system is employed, the
drive current has low noise and a low total current ripple.
The total drive current is controlled by the error amplifier
input voltage. The error amplifier has a voltage gain of
about –11dB (a factor of 0.28). The current feedback am
plifier regulates the total drive current, so that the error
amplifier output voltage (V1) is equal to the VRNF voltage,
which has been voltage-converted from the total drive
current through the RNF pin. If V1 exceeds the current lim-
iter voltage (Vcl), the constant voltage Vcl takes prece-
dence, and a current limit is applied at the level of Vcl /RNF.
The current feedback amplifier tends to oscillate be-
cause it receives all the feedback with a gain of 0dB. To
prevent this oscillation, connect an external capacitor to
the CNF pin for phase compensation and for reducing the
high frequency gain.
(2)
Speed control circuit
The speed control circuit is a non-adjustable digital servo
system that uses a frequency locked loop (FLL). The cir-
cuit consists of an 1 / 2 frequency divider, an FG amplifier,
and a speed discriminator (Fig. 14).
An internal reference is generated from an external clock
signal input. The 1 / 2 frequency divider reduces the fre-
quency of the OSC signal. The FG amplifier amplifies the
minute voltage generated by the motor FG pattern and
produces a rectangular-shaped speed signal. The FG
amplifier gain (GFG = 42dB, typical) is determined by the
internal resistance ratio.


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