DATA PROCESSOR

KD16903

7

5.2 HOST INTERFACE UNIT (HIU)

- I

The VIP can be controlled by a microcontroller via the 2-line I2C bus, SDA (Serial Data Line) and SCL (Serial

Clock Line). Both lines must be connected to a positive supply via pull-up resistor. Data transfer may be initiated

only when the bus is not busy. When the bus is free, both lines are high. The data on the SDA line must be stable

during the high period of clock, SCL. When the SCL is low, the SDA can change. Every byte transferred through

the SDA line must contain 8 bits including programmable slave address and read/write direction control bit. Each

byte must be followed by acknowledge bit which is sent back to the microcontroller by the VIP by pulling down the

SDA line. The MSB is transferred first.

- I

The start condition is high to low transition of the SDA line while the SCL is high. The stop condition is low to high

transition of the SDA line while SCL is high.

SDA

SCL

SDA

SCL

Data Valid

Change

of data

Allowed

S

P

Start

Condition

Stop

Condition