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KM416RD2C Datasheet(PDF) 6 Page - Samsung semiconductor |
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KM416RD2C Datasheet(HTML) 6 Page - Samsung semiconductor |
6 / 64 page Page 3 KM416RD8AC(D)/KM418RD8AC(D) Direct RDRAM™ Rev. 1.01 Oct. 1999 Table 3: Pin Description Signal I/O Type # of Pins Description SIO1,SIO0 I/O CMOSa 2 Serial input/output. Pins for reading from and writing to the control registers using a serial access protocol. Also used for power man- agement. CMD I CMOSa 1 Command input. Pins used in conjunction with SIO0 and SIO1 for reading from and writing to the control registers. Also used for power management. SCK I CMOSa 1 Serial clock input. Clock source used for reading from and writing to the control registers VDD 10 Supply voltage for the RDRAM core and interface logic. VDDa 1 Supply voltage for the RDRAM analog circuitry. VCMOS 2 Supply voltage for CMOS input/output pins. GND 13 Ground reference for RDRAM core and interface. GNDa 1 Ground reference for RDRAM analog circuitry. DQA8..DQA0 I/O RSLb 9 Data byte A. Nine pins which carry a byte of read or write data between the Channel and the RDRAM. DQA8 is not used by RDRAMs with a x16 organization. CFM I RSLb 1 Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. CFMN I RSLb 1 Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity VREF 1 Logic threshold reference voltage for RSL signals CTMN I RSLb 1 Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. CTM I RSLb 1 Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. RQ7..RQ5 or ROW2..ROW0 I RSLb 3 Row access control. Three pins containing control and address information for row accesses. RQ4..RQ0 or COL4..COL0 I RSLb 5 Column access control. Five pins containing control and address information for column accesses. DQB8.. DQB0 I/O RSLb 9 Data byte B. Nine pins which carry a byte of read or write data between the Channel and the RDRAM. DQB8 is not used by RDRAMs with a x16 organization. Total pin count per package 62 a. All CMOS signals are high-true; a high voltage is a logic one and a low voltage is logic zero. b. All RSL signals are low-true; a low voltage is a logic one and a high voltage is logic zero. |
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