1

FEATURES

PINOUT ASSIGNMENT

APPLICATIONS

DESCRIPTION

1

8

2

7

3

6

4

5

NC

Q

Q

NC

V

CC

D

NC

GND

D-8,DGK-8Package

(TopView)

P0065-04

TTL

PECL

SN65ELT20

5-V TTL-to-Differential PECL Translator

• 1.25-ns Maximum Propagation Delay

• Operating Range: V

GND = 0 V

• Flow-Through Pinout Enables Easy Layout

• Built-In Temperature Compensation

• Drop-In Compatible With MC10ELT20,

MC100ELT20

• Data and Clock Transmission Over Backplane

• Signaling Level Conversion for Clock or Data

The

SN65ELT20

is

a

TTL-to-differential

PECL

translator. It operates on a 5-V supply and ground

only. The output is undetermined when the inputs are

left floating. The low output skew makes the device

an ideal solution for clock or data signal translation.

The SN65ELT20 is housed in an industry-standard

Table 1. Pin Description

SOIC-8 package and is also available in a TSSOP-8

package.

PIN

FUNCTION

D

TTL input

Q,Q

PECL outputs

Positive supply

GND

Ground

PART NUMBER

PART MARKING

PACKAGE

LEAD FINISH

SN65ELT206D

SN65ELT20

SOIC

NiPdAu

SN65ELT20DGK

SN65ELT20

SOIC-TSSOP

NiPdAu

(1)

Leaded device options not initially available; contact a sales representative for further details.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Copyright © 2008, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.