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AD5755BCPZx Datasheet(PDF) 16 Page - Analog Devices |
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AD5755BCPZx Datasheet(HTML) 16 Page - Analog Devices |
16 / 34 page AD5755/AD5735 Preliminary Technical Data Rev. PrG | Page 16 of 34 THEORY OF OPERATION The AD5755/AD5735 is a quad, precision digital to current loop and voltage output converter designed to meet the requirements of industrial process control applications. It provides a high precision, fully integrated, low cost single-chip solution for generating current loop and unipolar/bipolar voltage outputs. The current ranges available are; 0 to 20mA, 0 to 24mA and 4 to 20mA, the voltage ranges available are; 0 to 5V, ±5V, 0 to 10V and ±10V, the current and voltage outputs are available on separate pins and only one is active at any one time. The desired output configuration is user selectable via the DAC Control Register. On chip dynamic power control minimizes package power dissipation in current mode. DAC ARCHITECTURE The DAC core architecture of the AD5755/AD5735 consists of two matched DAC sections. A simplified circuit diagram is shown in Figure 13. The 4 MSBs of the 16/12-bit data word are decoded to drive 15 switches, E1 to E15. Each of these switches connects 1 of 15 matched resistors to either ground or the reference buffer output. The remaining 12/8 bits of the data- word drive switches S0 to S11 /S7 of a 12/8-bit voltage mode R- 2R ladder network. Figure 13. DAC Ladder Structure The voltage output from the DAC core is either converted to a current (see Figure 15) which is then mirrored to the supply rail so that the application simply sees a current source output with respect to ground or it is buffered and scaled to output a software selectable unipolar or bipolar voltage range (See diagram, Figure 14). The current and voltage are output on separate pins and cannot be output simultaneously. A channels current and voltage output pins may be tied together. Figure 14. Voltage Output Figure 15. Voltage to Current conversion circuitry Voltage Output Amplifier The voltage output amplifier is capable of generating both unipolar and bipolar output voltages. It is capable of driving a load of 1 kΩ in parallel with 2000 pF to AGND. The source and sink capabilities of the output amplifier can be seen in Figure TBD. The slew rate is 1 V/µs with a full-scale settling time of 10 µs.(10V step). Driving Large Capacitive Loads The voltage output amplifier is capable of driving capacitive loads of up to 1uF with the addition of a non-polarized compensation capacitors on each channel. Care should be taken to choose an appropriate value of compensation capacitor. This capacitor, while allowing the AD5755/AD5735 to drive higher cap loads and reduce overshoot, will increase the settling time of the part and therefore effect the bandwidth of the system. Without the compensation capacitor, up to 20nF capacitive loads can be driven. See pin list for information on connecting compensation capacitors. Reference Buffers The AD5755/AD5735 can operate with either an external or internal reference. The reference input has an input range of 4 V to 5 V, 5 V for specified performance. This input voltage is then buffered before it is applied to the DAC. POWER ON STATE OF AD5755/AD5735 On initial power-up of the AD5755/AD5735 the power-on-reset circuit powers up in a state that is dependent on the POC (Power on Control) pin. If POC = 0 both the Vout/Iout channels will power up in Tri-state mode. If POC= 1 the Vout channel will Power up with 30k pull down to Ground, and the IOUT channel will power up to tri-state. Even though the output ranges are not enabled, the default output range is 0-5V, and the Clear Code Register is loaded with all zeros. This means if the user CLEARS the part after power-up the output will be actively driven to zero volts. (If the channel has been enabled for clear) 8-12 BIT R-2R LADDER FOUR MSBs DECODED INTO 15 EQUAL SEGMENTS 2R 2R S0 S1 S7/S11 E1 E2 E15 VOUT 2R 2R 2R 2R 2R DAC +VSENSE -VSENSE RANGE SCALING VOUT SHORT FAULT VOUT 12-/16-BIT DAC A1 VBOOST IOUT A2 T1 T2 RSET R2 R3 |
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