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MAX5974D Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX5974D Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 26 page  Active-Clamped, Spread-Spectrum, Current-Mode PWM Controllers 4 ELECTRICAL_CHARACTERISTICS_(continued) (VIN = 12V (for MAX5974A/MAX5974C, bring VIN up to 21V for startup), VCS = VCSSC = VDITHER/SYNC = VFB = VFFB = VDCLMP = VGND, VEN = +2V, NDRV = AUXDRV = SS = COMP = unconnected, RRT = 34.8kI, RDT = 25kI, CIN = 1FF, TA = -40NC to +85NC, unless otherwise noted. Typical values are at TA = +25NC.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS AUXDRV_DRIVER Pulldown Impedance RAUX-N IAUXDRV (sinking) = 50mA 4.3 7.7 I Pullup Impedance RAUX-P IAUXDRV (sourcing) = 25mA 10.6 18.9 I Peak Sink Current 0.5 A Peak Source Current 0.3 A Fall Time tAUX-F CAUXDRV = 1nF 24 ns Rise Time tAUX-R CAUXDRV = 1nF 45 ns DEAD-TIME_PROGRAMMING_(DT) DT Bias Voltage VDT 1.215 V NDRV to AUXDRV Delay (Dead Time) tDT From NDRV falling to AUXDRV falling RDT = 10kI 40 ns RDT = 100kI 300 350 410 AUXDRV rising to NDRV rising RDT = 10kI 40 ns RDT = 100kI 310 360 420 CURRENT-LIMIT_COMPARATORS_(CS) Cycle-by-Cycle Peak Current-Limit Threshold VCS-PEAK 375 393 410 mV Cycle-by-Cycle Reverse Current-Limit Threshold VCS-REV Turns AUXDRV off for the remaining cycle if reverse current limit is exceeded -118 -100 -88 mV Current-Sense Blanking Time for Reverse Current Limit tCS-BLANK- REV From AUXDRV falling edge 115 ns Number of Consecutive Peak Current-Limit Events to Hiccup NHICCUP 8 Events Current-Sense Leading-Edge Blanking Time tCS-BLANK From NDRV rising edge 115 ns Propagation Delay from Comparator Input to NDRV tPDCS From CS rising (10mV overdrive) to NDRV falling (excluding leading-edge blanking) 35 ns Minimum On-Time tON-MIN 100 150 200 ns SLOPE_COMPENSATION_(CSSC) Slope Compensation Current Ramp Height Current ramp’s peak added to CSSC input per switching cycle 47 52 58 F A PWM_COMPARATOR Comparator Offset Voltage VPWM-OS VCOMP - VCSSC 1.35 1.7 2 V Current-Sense Gain ACS-PWM D VCOMP/DVCSSC (Note 4) 3.1 3.33 3.6 V/V Current-Sense Leading-Edge Blanking Time tCSSC-BLANK From NDRV rising edge 115 ns Comparator Propagation Delay tPWM Change in VCSSC = 10mV (including internal leading-edge blanking) 150 ns |
Similar Part No. - MAX5974D |
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Similar Description - MAX5974D |
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