Electronic Components Datasheet Search |
|
ISL6218CVZA Datasheet(PDF) 5 Page - Intersil Corporation |
|
ISL6218CVZA Datasheet(HTML) 5 Page - Intersil Corporation |
5 / 19 page 5 FN9101.6 August 6, 2007 Functional Pin Description 38 Ld TSSOP VDD This pin is used to connect +5V to the IC to supply all power necessary to operate the chip. The IC starts to operate when the voltage on this pin exceeds the rising POR threshold and shuts down when the voltage on this pin drops below the falling POR threshold. VDDP This pin provides a low ESR bypass connection to the internal gate drivers for the +5V source. PGOOD This pin is used as an input and an output and is tied to the Vccp and Vcc_mch PGOOD signals. During start-up, this pin is recognized as an input, and prevents further slewing of the output voltage from the “Boot” level until PGOOD from Vccp and Vcc_mch is enabled High. After start-up, this pin has an open drain output used to indicate the status of the CORE output voltage. This pin is pulled low when the system output is outside of the regulation limits. PGOOD includes a timer for power-on delay. EN This pin is connected to the system signal VR_ON and provides the enable/disable function for the PWM controller. OCSET A resistor from this pin to ground sets the overcurrent protection threshold. The current from this pin should be between 10µA and 25µA (70k Ω to 175kΩ equivalent pull-down resistance). VSEN This pin is used for remote sensing of the microprocessor CORE voltage. COMP This pin provides connection to the error amplifier output. FB This pin is connected to the inverting input of the error amplifier. EA+ This pin is connected to the non-inverting input of the error amplifier and is used for setting the “Droop” voltage. STV The voltage on this pin sets the initial start-up or “Boot” voltage. SOFT This pin programs the slew rate of VID changes, Deep Sleep and Deeper Sleep transitions, and soft-start after initializing. This pin is connected to ground via a capacitor, and to EA+ through an external “Droop” resistor. DSEN This pin connects to system logic “STP_CPU” and enables Deep Sleep mode of operation. Deep Sleep is enabled when a logic LOW signal is detected on this pin. DRSEN This pin connects to system logic “DPRSLPVR” and enables Deeper Sleep mode of operation when a logic HIGH is detected on this pin. VBAT Voltage on this pin provides feed-forward battery information that adjusts the oscillator ramp amplitude. FSET A resistor from this pin to ground programs the switching frequency. ISEN This pin is used as current sense input from the converter channel phase node. DACOUT This pin provides access to the output of the Digital-to- Analog Converter. DSV The voltage on this pin provides the setpoint for output voltage during Deep Sleep Mode of operation. DRSV The voltage on this pin provides the setpoint for output voltage during Deeper Sleep Mode of operation. 12 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 VDD DACOUT DSV FSET NC EN DRSEN DSEN VID0 VID1 VID2 VID3 VID4 VID5 PGOOD EA+ COMP FB SOFT 27 38 37 36 35 34 33 32 31 30 29 28 26 25 24 23 22 21 20 VBAT ISEN PHASE UG BOOT VSSP LG VDDP NC NC NC NC NC NC VSEN DRSV STV OCSET VSS ISL6218 ISL6218 |
Similar Part No. - ISL6218CVZA |
|
Similar Description - ISL6218CVZA |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |