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MB90351TEPMC Datasheet(PDF) 7 Page - Fujitsu Component Limited. |
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MB90351TEPMC Datasheet(HTML) 7 Page - Fujitsu Component Limited. |
7 / 92 page MB90350E Series DS07-13744-4E 7 • MASK ROM products/Evaluation products (Continued) Part Number Parameter MB90351E MB90352E MB90351TE MB90352TE MB90351ES MB90352ES MB90351TES MB90352TES MB90V340E- 101 MB90V340E- 102 Type MASK ROM products Evaluation products CPU F2MC-16LX CPU System clock PLL clock multiplication circuit ( ×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (oscillation clock 4 MHz, PLL × 6) ROM MASK ROM 64 Kbytes : MB90351E(S), MB90351TE(S) 128 Kbytes : MB90352E(S), MB90352TE(S) External RAM 4 Kbytes 30 Kbytes Emulator-specific power supply* ⎯ Yes Sub clock pin (X0A, X1A) (Max 100 kHz) Yes No No Yes Clock supervisor No Low voltage/CPU operation detection reset No Yes No Yes No Operating voltage range 3.5 V to 5.5 V : at normal operating (not using A/D converter) 4.0 V to 5.5 V : at using A/D converter 4.5 V to 5.5 V : at using external bus 5 V ± 10% Operating temperature range −40 °C to +125 °C ⎯ Package LQFP-64 PGA-299 LIN-UART 2 channels 5 channels Wide range of baud rate settings using a dedicated baud rate generator (reload timer) Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device I2C (400 kbps) 1 channel 2 channels A/D converter 15 channels 24 channels 10-bit or 8-bit resolution Conversion time : Min 3 µs includes sample time (per one channel) 16-bit reload timer 2 channels 4 channels Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency) Supports External Event Count function. 16-bit free-run timer (2 channels) Free-run Timer 0 (clock input FRCK0) corresponds to ICU0/1. Free-run Timer 1 (clock input FRCK1) corresponds to ICU4/5/6/7, OCU4/5/6/7. Free-run Timer 0 corresponds to ICU0/1/2/ 3, OCU0/1/2/3. Free-run Timer 1 corresponds to ICU4/5/6/ 7, OCU4/5/6/7. Signals an interrupt when overflowing. Supports Timer Clear when it matches Output Compare (ch.0, ch.4) . Operation clock frequency : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27 (fsys = Machine clock frequency) |
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