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PESD5V0V1BSF Datasheet(PDF) 7 Page - NXP Semiconductors |
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PESD5V0V1BSF Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 13 page PESD5V0V1BSF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 — 17 February 2011 7 of 13 NXP Semiconductors PESD5V0V1BSF Bidirectional very low capacitance ESD protection diode 7. Application information The PESD5V0V1BSF is designed for the protection of one data or signal line from the damage caused by ESD and/or other surge pulses. The device may be used on lines where the signal polarities are both, positive and negative with respect to ground. It provides protection against surges with up to 8 W per line. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD and Electrical Fast Transient (EFT). The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. The path length between the device and the protected line should be minimized. 3. Avoid running protected conductors in parallel with unprotected conductors. 4. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 5. Minimize the length of the transient return path to ground. 6. Avoid using shared transient return paths to a common ground point. 7. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. Fig 10. Application diagram 018aaa048 PESD5V0V1BSF GND line to be protected |
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