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C8051F50X Datasheet(PDF) 91 Page - Silicon Laboratories |
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C8051F50X Datasheet(HTML) 91 Page - Silicon Laboratories |
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91 / 312 page  Rev. 1.1 91 C8051F50x-F51x SETB C Set Carry 1 1 SETB bit Set direct bit 2 2 CPL C Complement Carry 1 1 CPL bit Complement direct bit 2 2 ANL C, bit AND direct bit to Carry 2 2 ANL C, /bit AND complement of direct bit to Carry 2 2 ORL C, bit OR direct bit to carry 2 2 ORL C, /bit OR complement of direct bit to Carry 2 2 MOV C, bit Move direct bit to Carry 2 2 MOV bit, C Move Carry to direct bit 2 2 JC rel Jump if Carry is set 2 2/(4-6)* JNC rel Jump if Carry is not set 2 2/(4-6)* JB bit, rel Jump if direct bit is set 3 3/(5-7)* JNB bit, rel Jump if direct bit is not set 3 3/(5-7)* JBC bit, rel Jump if direct bit is set and clear bit 3 3/(5-7)* Program Branching ACALL addr11 Absolute subroutine call 2 4-6* LCALL addr16 Long subroutine call 3 5-7* RET Return from subroutine 1 6-8* RETI Return from interrupt 1 6-8* AJMP addr11 Absolute jump 2 4-6* LJMP addr16 Long jump 3 5-7* SJMP rel Short jump (relative address) 2 4-6* JMP @A+DPTR Jump indirect relative to DPTR 1 3-5* JZ rel Jump if A equals zero 2 2/(4-6)* JNZ rel Jump if A does not equal zero 2 2/(4-6)* CJNE A, direct, rel Compare direct byte to A and jump if not equal 3 4/(6-8)* CJNE A, #data, rel Compare immediate to A and jump if not equal 3 3/(6-8)* CJNE Rn, #data, rel Compare immediate to Register and jump if not equal 3 3/(5-7)* CJNE @Ri, #data, rel Compare immediate to indirect and jump if not equal 3 4/(6-8)* DJNZ Rn, rel Decrement Register and jump if not zero 2 2/(4-6)* DJNZ direct, rel Decrement direct byte and jump if not zero 3 3/(5-7)* NOP No operation 1 1 Table 11.1. CIP-51 Instruction Set Summary (Prefetch-Enabled) (Continued) Mnemonic Description Bytes Clock Cycles Note: Certain instructions take a variable number of clock cycles to execute depending on instruction alignment and the FLRT setting (SFR Definition 15.3). |
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