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C8051F50X Datasheet(PDF) 41 Page - Silicon Laboratories

Part # C8051F50X
Description  Mixed Signal ISP Flash MCU Family
Download  312 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F50X Datasheet(HTML) 41 Page - Silicon Laboratories

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Rev. 1.1
41
C8051F50x-F51x
5.2. Electrical Characteristics
Table 5.2. Global Electrical Characteristics
–40 to +125 °C, 24 MHz system clock unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
Supply Input Voltage (VREGIN)1.8
5.25
V
Digital Supply Voltage (VDD)
System Clock < 25 MHz
System Clock > 25 MHz
VRST
1
—2.75
V
22.75
Analog Supply Voltage (VDDA)
(Must be connected to VDD)
System Clock < 25 MHz
System Clock > 25 MHz
VRST
1
—2.75
V
22.75
Digital Supply RAM Data
Retention Voltage
1.5
Port I/O Supply Voltage (VIO)
Normal Operation
1.82
—5.25
V
SYSCLK (System Clock)3
0—
50
MHz
TSYSH (SYSCLK High Time)
9
ns
TSYSL (SYSCLK Low Time)
9
ns
Specified Operating
Temperature Range
–40
+125
°C
Digital Supply Current—CPU Active (Normal Mode, fetching instructions from Flash)
IDD
4
VDD = 2.1 V, F = 200 kHz
95
µA
VDD = 2.1 V, F = 1.5 MHz
700
µA
VDD = 2.1 V, F = 25 MHz
10
11
mA
VDD = 2.1 V, F = 50 MHz
19
21
mA
Notes:
1.
Given in Table 5.4 on page 46.
2.
VIO should not be lower than the VDD voltage.
3.
SYSCLK must be at least 32 kHz to enable debugging.
4.
Based on device characterization data; Not production tested. Does not include oscillator supply current.
5.
IDD can be estimated for frequencies
< 12.5 MHz by simply multiplying the frequency of interest by the
frequency sensitivity number for that range. When using these numbers to estimate IDD for >12.5 MHz, the
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number. For example: VDD = 2.6 V; F = 20 MHz, IDD = 26 mA - (50 MHz -
20 MHz) * 0.48 mA/MHz = 11.6 mA.
6.
Idle IDD can be estimated for frequencies
< 1 MHz by simply multiplying the frequency of interest by the
frequency sensitivity number for that range. When using these numbers to estimate Idle IDD for >1 MHz, the
estimate should be the current at 50 MHz minus the difference in current indicated by the frequency
sensitivity number.
For example: VDD = 2.6 V; F = 5 MHz, Idle IDD = 21 mA – (50 MHz – 5 MHz) x 0.41 mA/MHz = 2.6 mA.


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