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C8051F902-GD Datasheet(PDF) 6 Page - Silicon Laboratories |
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C8051F902-GD Datasheet(HTML) 6 Page - Silicon Laboratories |
6 / 318 page C8051F91x-C8051F90x 6 Rev. 1.0 19.2.Low Power Internal Oscillator......................................................................... 180 19.3.External Oscillator Drive Circuit...................................................................... 180 19.3.1.External Crystal Mode............................................................................ 180 19.3.2.External RC Mode.................................................................................. 182 19.3.3.External Capacitor Mode........................................................................ 183 19.3.4.External CMOS Clock Mode .................................................................. 184 19.4.Special Function Registers for Selecting and Configuring the System Clock 185 20. SmaRTClock (Real Time Clock) .......................................................................... 188 20.1.SmaRTClock Interface ................................................................................... 189 20.1.1.SmaRTClock Lock and Key Functions................................................... 189 20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock Internal Registers ................................................................................... 190 20.1.3.RTC0ADR Short Strobe Feature............................................................ 190 20.1.4.SmaRTClock Interface Autoread Feature .............................................. 190 20.1.5.RTC0ADR Autoincrement Feature......................................................... 191 20.2.SmaRTClock Clocking Sources ..................................................................... 194 20.2.1.Using the SmaRTClock Oscillator with a Crystal or External CMOS Clock ............................................................................ 194 20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 195 20.2.3.Using the Low Frequency Oscillator (LFO) ............................................ 195 20.2.4.Programmable Load Capacitance.......................................................... 196 20.2.5.Automatic Gain Control (Crystal Mode Only) and SmaRTClock Bias Doubling ................................................................... 197 20.2.6.Missing SmaRTClock Detector .............................................................. 199 20.2.7.SmaRTClock Oscillator Crystal Valid Detector ...................................... 199 20.3.SmaRTClock Timer and Alarm Function ........................................................ 199 20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 199 20.3.2.Setting a SmaRTClock Alarm ................................................................ 200 20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 200 21. Port Input/Output.................................................................................................. 205 21.1.Port I/O Modes of Operation........................................................................... 206 21.1.1.Port Pins Configured for Analog I/O....................................................... 206 21.1.2.Port Pins Configured For Digital I/O....................................................... 206 21.1.3.Interfacing Port I/O to 5 V and 3.3 V Logic............................................. 207 21.1.4.Increasing Port I/O Drive Strength ......................................................... 207 21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 207 21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 207 21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 208 21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 208 21.3.Priority Crossbar Decoder .............................................................................. 209 21.4.Port Match ...................................................................................................... 215 21.5.Special Function Registers for Accessing and Configuring Port I/O .............. 217 22. SMBus ................................................................................................................... 225 22.1.Supporting Documents ................................................................................... 226 22.2.SMBus Configuration...................................................................................... 226 |
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