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C8051F902-GD Datasheet(PDF) 1 Page - Silicon Laboratories

Part # C8051F902-GD
Description  Single/Dual Battery,0.9-3.6 V, 16-8 kB, SmaRTClock, 12/10-Bit ADC MCU
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F902-GD Datasheet(HTML) 1 Page - Silicon Laboratories

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Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU
C8051F91x-C8051F90x
Rev. 1.0 9/10
Copyright © 2010 by Silicon Laboratories
C8051F91x-C8051F90x
Ultra-Low Power
-
160 uA/MHz in active mode (24.5 MHz clock)
-
2 us wake-up time (two-cell mode)
-
10 nA sleep mode with memory retention;
-
50 nA sleep mode with brownout detector
-
300 nA sleep mode with LFO (‘F912/02 only)
-
600 nA sleep mode with external crystal
Supply Voltage 0.9 to 3.6 V
-
One-cell mode supports 0.9 to 1.8 V operation
(‘F911/01). ‘F912 and ‘F902 devices can operate
from 0.9 to 3.6 V continuously
-
Two-cell mode supports 1.8 to 3.6 V operation
-
Built-in dc-dc converter with 1.8 to 3.3 V output for
use in one-cell mode
-
Built-in LDO regulator allows a high analog supply
voltage and low digital core voltage
-
2 built in supply monitors (brownout detectors)
12-Bit or 10-Bit Analog to Digital Converter
-
±1 LSB INL (10-bit mode); ±1.5 LSB INL (12-bit
mode, ‘F912/02 only) no missing codes
-
Programmable throughput up to 300 ksps (10-Bit
Mode) or 75 ksps (12-bit mode, ‘F912/02 only)
-
Up to 15 external inputs
-
On-chip voltage reference
-
On-Chip PGA allows measuring voltages up to twice
the reference voltage
-
16-bit auto-averaging accumulator with burst mode
provides increased ADC resolution
-
Data dependent windowed interrupt generator
-
Built-in temperature sensor
Two Comparators
-
Programmable hysteresis and response time
-
Configurable as wake-up or reset source
-
Up to 15 Capacitive Touch Sense Inputs
6-Bit Programmable Current Reference
-
Up to ±500 µA. Can be used as a bias or for
generating a custom reference voltage
-
PWM enhanced mode on ‘F912/02 devices
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
-
Up to 25 MIPS throughput with 25 MHz clock
-
Expanded interrupt handler
Memory
-
768 bytes RAM
-
16 kB (‘F912/1), or 8 kB (‘F902/1) Flash; In-system
programmable
Digital Peripherals
-
16 port I/O; All 5 V tolerant with high sink
current and programmable drive strength
-
Hardware SMBus™ (I2C™ Compatible), 2 x SPI™,
and UART serial ports available concurrently
-
Four general purpose 16-bit counter/timers
-
Programmable 16-bit counter/timer array with six
capture/compare modules and watchdog timer
Clock Sources
-
Internal oscillators: 24.5 MHz, 2% accuracy
supports UART operation; 20 MHz low power
oscillator requires very little bias current.
-
External oscillator: Crystal, RC, C, or CMOS clock
-
SmaRTClock oscillator: 32 kHz crystal or internal
low frequency oscillator (‘F912/02) or self-oscillate
mode
-
Can switch between clock sources on-the-fly; useful
in implementing various power saving modes
On-Chip Debug
-
On-chip debug circuitry facilitates full-speed, non-
intrusive in-system debug (no emulator required)
-
Provides 4 breakpoints, single stepping
-
Inspect/modify memory and registers
-
Complete development kit
Packages
-
24-pin QFN (4 x 4 mm)
-
24-pin QSOP (easy to hand-solder)
-
Tested die available
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
12/10-bit
75/300 ksps
ADC
16/8 kB
ISP FLASH
768 B SRAM
POR
DEBUG
CIRCUITRY
FLEXIBLE
INTERRUPTS
8051 CPU
(25 M IPS)
TEMP
SENSO R
DIGITAL I/O
24.5 MHz PRECISION
INTERNAL OSCILLATO R
HIGH-SPEED CONTROLLER CORE
A
M
U
X
VOLTAGE
COM PARATORS
+
WDT
UART
SM Bus
PCA
Tim er 0
Tim er 1
Tim er 2
Tim er 3
Port 0
2 x SPI
IREF
Port 1
Port 2
+
VREG
20 MHz LO W PO WER
INTERNAL O SCILLATO R
VREF
CRC
HARDW ARE Sm aRTClock
External Oscillator


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