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STR755FR1H6 Datasheet(PDF) 16 Page - STMicroelectronics |
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STR755FR1H6 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 84 page  Pin description STR750Fxx STR751Fxx STR752Fxx STR755Fxx 16/84 Port reset state The reset state of the I/O ports is GPIO input floating. Exceptions are P1[19:16] and P0.13 which are configured as JTAG alternate functions: ● The JTAG inputs (JTDI, JTMS and JTDI) are configured as input floating and are ready to accept JTAG sequences. ● The JTAG output JTDO is configured as floating when idle (no JTAG operation) and is configured in output push-pull only when serial JTAG data must be output. ● The JTAG output RTCK is always configured as output push-pull. It outputs '0' level during the reset phase and then outputs the JTCK input signal resynchronized 3 times by the internal AHB clock. ● The GPIO_PCx registers do not control JTAG AF selection, so the reset values of GPIO_PCx for P1[19:16] and P0. 13 are the same as other ports. Refer to the GPIO section of the STR750 Reference Manual for the register description and reset values. ● P0.11 and P0.00 are sampled by the boot logic after reset, prior to fetching the first word of user code at address 0000 0000h. ● When booting from SMI (and only in this case), the reset state of the following GPIOs is "SMI alternate function output enabled": – P0.07 (SMI_DOUT) – P0.05 (SMI_CLK) – P0.04 (SMI_CS0) – P0.06 (SMI_DIN) Note that the other SMI pins: SMI_CS1,2,3 (P0.12, P0.11, P0.10) are not affected. To avoid excess power consumption, unused I/O ports must be tied to ground. Table 6. STR750F pin description Pin n° Pin name Input Output Main function (after reset) Alternate function OD (3) PP 1B1 1 B1 P1.12 / ADC_IN13 I/O TT X XEIT12 O8 X X Port 1.12 ADC: Analog input 13 2B2 2 C2 P0.02 / TIM2_OC1 / ADC_IN0 I/O TT X XEIT0 O8 X X Port 0.02 TIM2: Output Compare 1(4) ADC: Analog input 0 3B3 3 C1 P0.01 / TIM0_TI1 / MCO I/O TT X XO8 X X Port 0.01 TIM0: Input Capture / trigger / external clock 1 Main Clock Output 4C2 4 C3 P0.00 / TIM0_OC1 / BOOT0 I/O TT X XO8 X X Port 0.00 / Boot mode selection input 0 TIM0: Output Compare 1 5 C1 P0.31 / TIM1_TI2 I/O TT X XO2 X X Port 0.31 TIM1: Input Capture / trigger / external clock 2 6D2 P0.30 / TIM1_OC2 I/O TT X XO2 X X Port 0.30 TIM1: Output Compare 2 |
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Similar Description - STR755FR1H6 |
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