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ST10F272Z2 Datasheet(PDF) 5 Page - STMicroelectronics

Part # ST10F272Z2
Description  16-bit MCU with 256 Kbyte Flash memory and 20 Kbyte RAM
Download  189 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F272Z2 Datasheet(HTML) 5 Page - STMicroelectronics

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ST10F272Z2
Contents
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21.2
Power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
21.2.1
Protected power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
21.2.2
Interruptible power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
21.3
Stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
21.3.1
Entering stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
21.3.2
Exiting stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
21.3.3
Real-time clock and stand-by mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
21.3.4
Power reduction modes summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
22
Programmable output clock divider . . . . . . . . . . . . . . . . . . . . . . . . . . 112
23
Register set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
23.1
Special function registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
23.2
X-registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
23.3
Flash registers ordered by name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
23.4
Identification registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
24
Known limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
24.1
Injected conversion stalling the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
24.2
Concurrent transmission requests in DAR-mode (C-CAN module) . . . . 131
24.3
Transmission request disabled (C-CAN module) . . . . . . . . . . . . . . . . . . 132
24.4
Spurious BREQ pulse in slave mode during external bus
arbitration phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
24.5
Flash wake-up from idle mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
24.6
Executing PWRDN instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
24.7
Flash wake-up from Power Down mode . . . . . . . . . . . . . . . . . . . . . . . . . 135
24.8
Behavior of CAPCOM outputs in COMPARE mode 3 . . . . . . . . . . . . . . 135
25
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
25.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
25.2
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
25.3
Power considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
25.4
Parameter interpretation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
25.5
DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
25.6
Flash characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144


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