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MAX16806ATP Datasheet(PDF) 5 Page - Maxim Integrated Products |
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MAX16806ATP Datasheet(HTML) 5 Page - Maxim Integrated Products |
5 / 19 page EEPROM-Programmable, High-Voltage, 350mA LED Drivers with LED Current Foldback _______________________________________________________________________________________ 5 ELECTRICAL CHARACTERISTICS (continued) (VIN = VEN = 12V, CV5 = 0.1µF, IV5 = 0, CS- = GND, RSENSE = 0.56Ω, VDIM = 4V, DGND = GND, TFP/SCL = 5V, TFN/SDA = 0V, SW = CFD = Open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS EEPROM VIN Voltage for EEPROM Programming 20 22 24 V EEPROM Data-Retention Time 10 Years I2C DIGITAL INPUTS (TFP/SCL, TFN/SDA) (Note 5) Logic Input-Voltage High VIH 2.8 V Logic Input-Voltage Low VIL 0.8 V Input Capacitance 5pF SDA Output Voltage Low VOL ISINK = 3mA 0.4 V I2C INTERFACE TIMING (Figure 1) Serial Clock Frequency fSCL 400 kHz Bus Free Time Between STOP and START Condition tBUF 1.3 µs START Condition Hold Time tHD:STA 0.6 µs Clock Low Period tLOW 1.3 µs Clock High Period tHIGH 0.6 µs Repeat START Condition Setup Time tSU:STA 0.6 µs Data Hold Time tHD:DAT A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) in order to bridge the undefined region of SCL’s falling edge 0 0.9 µs Data Setup Time tSU:DAT 100 ns Receive SCL/SDA Rise Time tR 300 ns Receive SCL/SDA Fall Time tF 250 ns STOP Condition Setup Time tSU:STO 0.6 µs Pulse Width of Spike Suppressed tSP 50 ns Transmit SDA Fall Time ISINK < 6mA, CB ≤ 400pF (Note 6) 250 ns Note 1: All devices 100% production tested at TJ = +25°C. Limits over the operating temperature range are guaranteed by design. Note 2: Resistors were added from OUT to CS+ to aid with the power dissipation during testing. Note 3: Dropout is measured as follows: Connect a resistor from OUT to CS+. Connect RSENSE = 0.56Ω from CS+ to CS-. Set VIN = VOUT +3V (record VOUT as VOUT1). Reduce VIN until VOUT = 0.97 x VOUT1 (record as VIN2 and VOUT2). ΔVDO = VIN2 - VOUT2. Note 4: tON time includes the delay and the rise time needed for IOUT to reach 90% of its final value. tOFF time is the time needed for IOUT to drop below 10%. See the Typical Operating Characteristics. tON and tOFF are tested with 13Ω from OUT to CS+. Note 5: TPF/SCL (SCL for MAX16805) and TPN/SDA (SDA for the MAX16805) are I2C interface compatible only when the MAX16805/MAX16806 are the only parts on the bus for production programming. Note 6: CB is the total bus capacitance. |
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