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TDA5150 Datasheet(PDF) 46 Page - Infineon Technologies AG |
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TDA5150 Datasheet(HTML) 46 Page - Infineon Technologies AG |
46 / 106 page TDA 5150 TDA 5150 Functional Description Data Sheet 46 V 1.0, July 2009 . Figure 17 PA Core with Output Power Control Two independent PA power level settings can be configured. With the Transmit Command the PA power level is selected together with the modulation setting. This means, either power level 1 AND modulation type 1 or power level 2 AND modulation type 2 are selected, according to Modulation Setting 1 or Modulation Setting 2 field in Transmit Configuration byte. The 3 PA Blocks are enabled by PA_PS1 and PA_PS2 bits within SFR POWCFG0 (0x1A). The bits PA_PS1 do enable the PA blocks for power level 1 and bits PA_PS2 are used for power level 2. Enabling the 3 PA Blocks offers following typical PA ranges (note that the PA output power depends also on the external matching circuit, at a quite large extent): • PA_PS bit0=1: 5dBm matched; Pout = +5dBm down to -10dBm, 9 PA Stages • PA_PS bit1=1: 8dBm matched; Pout = +8dBm down to -10dBm, 10 PA Stages • PA_PS bit2=1:10dBm matched; Pout = +10dBm down to -10dBm, 11 PA Stages In addition to enabling the PA Blocks, the 11 PA stages have to be configured. This is achieved by setting the bit-fields POUT1 (0x1B.3:0) for power level 1 and POUT2 (0x1B.7:4) for power level 2 in SFR POWCFG1 (0x1B) (POUTn=0 means that the PA is effectively OFF). 1 PAout 1 from SDPLL VDD 1 Driver 4 PA & ASK Sloping control SLOPDIV 10 PA_PS bit2 - stage 11 PA_PS bit1 - stage 10 PA_PS bit0 - stages 9-1 9 |
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