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BTS50050-1EGA Datasheet(PDF) 9 Page - Infineon Technologies AG |
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BTS50050-1EGA Datasheet(HTML) 9 Page - Infineon Technologies AG |
9 / 33 page Datasheet 9 V1.0, 2009-04-06 Smart High-Side Power Switch BTS50050-1EGA General Product Characteristics 4.3 Thermal Resistance Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Junction to case 1) Not subject to production test, specified by design 1) R thjc - - 1.3 K/W 2) Specified Rthjc value is simulated at natural convection on a cold plate setup. Ta = 25 °C. Control chip to case 1) R thj(cc)c - 40 - K/W 3) Specified Rthj(cc)c value is simulated at natural convection on a cold plate setup. Ta = 25 °C, IL = 0A. Junction to ambient 1) device on PCB 4) Specified Rthja value and Figure 4 are according Jedec JESD51_7 at natural convection on FR4 2s2p board. The BTS50050-1EGA was measured on a 76.2 x 114.3 x 1.6 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu) applying power losses of 1.4W at the channel. According to JESD51-5 a thermal via array under the exposed pad contacted the first inner copper layer. Ta = 25 °C. 4) R thja - 27 - K/W – 3) 2) W 3 VHF = WK-$ .: Figure 4 shows the typical transient thermal impedance of BTS50050-1EGA. Figure 4 Transient Thermal Impedance Zth(JA)=f(tp) 4) 4.4 Pos. Parameter Value Test Conditions Jedec humidity category acc. J-STD-020-D MSL3 - Jedec classification temperature acc. J-STD-020-D 260°C - Package 4.3.1 4.3.1 4.3.1 4.4.1 4.4.2 |
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