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TLE42664 Datasheet(PDF) 6 Page - Infineon Technologies AG |
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TLE42664 Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 12 page ![]() TLE42664 General Product Characteristics Data Sheet 6 Rev. 1.01, 2009-09-30 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. TLE42664G (PG-SOT223-4) 4.3.1 Junction to Case1) 1) Not subject to production test, specified by design. R thJC – 17 – K/W measured to heat slug 4.3.2 Junction to Ambient1) R thJA –54 – K/W 2) 2) Specified R thJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 4.3.3 – 139 – K/W footprint only3) 3) Specified R thJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product (Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu). 4.3.4 – 73 – K/W 300 mm² heatsink area3) 4.3.5 – 64 – K/W 600 mm² heatsink area3) |
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