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P89LPC9211FDH Datasheet(PDF) 1 Page - NXP Semiconductors

Part # P89LPC9211FDH
Description  8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

P89LPC9211FDH Datasheet(HTML) 1 Page - NXP Semiconductors

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1.
General description
The P89LPC9201/9211/922A1/9241/9251 is a single-chip microcontroller, available in low
cost packages, based on a high performance processor architecture that executes
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many
system-level functions have been incorporated into the device in order to reduce
component count, board space, and system cost.
2.
Features and benefits
2.1 Principal features
2 kB/4 kB/8 kB byte-erasable flash code memory organized into 1 kB sectors and
64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data
storage.
256-byte RAM data memory.
4-input multiplexed 8-bit ADC/single DAC output (P89LPC9241/9251). Two analog
comparators with selectable inputs and reference source.
On-chip temperature sensor integrated with ADC module (P89LPC9241/9251).
Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output).
A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit
prescaler and a programmable and readable 16-bit timer.
Enhanced UART with a fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I2C-bus
communication port.
2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
Enhanced low voltage (brownout) detect allows a graceful system shutdown when
power fails.
20-pin TSSOP and DIP packages with 15 I/O pins minimum and up to 18 I/O pins
while using on-chip oscillator and reset options.
P89LPC9201/9211/922A1/9241/
9251
8-bit microcontroller with accelerated two-clock 80C51 core
2 kB/4 kB/8 kB 3 V byte-erasable flash with 8-bit ADC
Rev. 2 — 1 December 2010
Product data sheet


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