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TLE4299 Datasheet(PDF) 14 Page - Infineon Technologies AG |
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TLE4299 Datasheet(HTML) 14 Page - Infineon Technologies AG |
14 / 25 page ![]() Datasheet 14 Rev. 1.1, 2007-10-17 TLE 4299 Reset The power on reset feature is necessary for a defined start of the microprocessor when switching on the application. For the reset delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set High again. The reset delay time is defined by the reset delay capacitor C D at pin D. The under-voltage reset circuitry supervises the output voltage. In case V Q decreases below the reset threshold the reset output is set LOW after the reset reaction time. The reset LOW signal is generated down to an output voltage V Q to 1 V. Both the reset reaction time and the reset delay time is defined by the capacitor value. The power on reset delay time is defined by the charging time of an external delay capacitor C D. C D = (td × ID) / ∆V [1] t d = CD x ∆V / ID [2] With C D reset delay capacitor t d reset delay time ∆V = V DT, typical 1.8 V for power up reset I ch charge current typical 3.5 µA For a delay capacitor C D =100 nF the typical power on reset delay time is 51 ms. The reset reaction time t RR is the time it takes the voltage regulator to set reset output LOW after the output voltage has dropped below the reset threshold. It is typically 1.2 µs for delay capacitor of 100 nF. For other values for C D the reaction time can be estimated using the following equation: t RR ∼ 10 ns / nF × CD [3] |
Similar Part No. - TLE4299_07 |
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Similar Description - TLE4299_07 |
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