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TLE8104E Datasheet(PDF) 9 Page - Infineon Technologies AG |
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TLE8104E Datasheet(HTML) 9 Page - Infineon Technologies AG |
9 / 27 page TLE8104E Smart Quad Channel Powertrain Switch Electrical and Functional Description of Blocks Data Sheet 9 V1.4, 2010-04-26 5 Electrical and Functional Description of Blocks 5.1 Power Supply The TLE8104E is supplied by power supply line VS, used for the digital as well as the analog functions of the device including the gate control of the power stages. A capacitor between pins VS to GND is recommended. A RESET pin is available. When a low level is applied to this pin, the device enters sleep mode. In this case, all registers are set to their default values and the quiescent supply current is minimized. After start-up of the power supply, the RESET pin should be kept low until the Reset Duration Time has expired, reseting all SPI registers to their default values. 5.2 Parallel Inputs Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls OUT2, etc. Please refer to Figure 4 for details. The PRG pin selects if the input pins are active high or active low and activates either a pull-down or pull-up current source. If PRG is high, the input pins are active high and the pull-down current source is active. If PRG is low, the input pins are active low and the pull-up current source is active. The respective current sources at the input pin ensure that the channels switch off in case of an unconnected pin. The zener diode protects the input circuit against ESD pulses. The BOL bit can be set via SPI. This bit determines if a Boolean OR or AND operation is performed on the INn signals and their corresponding data bits CHnIN . The default setting of the BOL bit programs the device to perform an OR operation. Electrical Characteristics: Power Supply V S = 4.5 V to 5.5 V, Tj = -40 °C to +150 °C, (unless otherwise specified) all voltages with respect to ground, positive current flowing into pin Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. 5.1.1 Supply Voltage V S 4.5 – 5.5 V – 5.1.2 Supply Current I S(ON) – 1 2 mA all channels ON 5.1.3 Input Low Voltage of pin RESET V RESET(L) -0.3 – 1.0 V – 5.1.4 Input High Voltage of pin RESET V RESET(H) 2.0 – V S +0.3 V – 5.1.5 High Input Pull-up Current through pin RESET I RESET(L) -100 -50 -20 µA V RESET =2V, 5.1.6 Reset duration time1) 1) For proper startup, after the supply VS has reached its final voltage, the RESET pin should be held low until the reset duration time has expired. t RESET(L) 10 – – µs– |
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