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74HCT157D Datasheet(PDF) 3 Page - NXP Semiconductors |
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74HCT157D Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 18 page 74HC_HCT157 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 3 — 31 December 2010 3 of 18 NXP Semiconductors 74HC157; 74HCT157 Quad 2-input multiplexer 5. Pinning information 5.1 Pinning Fig 3. Logic symbol Fig 4. IEC logic symbol mna483 MULTIPLEXER OUTPUTS SELECTOR 1Y 2Y 3Y 4Y 12 9 7 4 S 13 15 1 14 10 11 6 5 3 2 E 1I0 1I1 2I0 2I1 3I0 3I1 4I0 4I1 mna482 12 9 7 1 G1 15 EN 1 MUX 1 4 13 14 10 11 6 5 3 2 (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration DIP16, SO16, (T)SSOP16 Fig 6. Pin configuration DHVQFN16 74HC157 74HCT157 SVCC 1I0 E 1I1 4I0 1Y 4I1 2I0 4Y 2I1 3I0 2Y 3I1 GND 3Y 001aan353 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aan354 2Y 3I1 2I1 3I0 2I0 4Y GND(1) 1Y 4I1 1I1 4I0 1I0 E Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area 74HC157 74HCT157 |
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