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TDA8133D Datasheet(PDF) 9 Page - STMicroelectronics |
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TDA8133D Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 14 page Obsolete Product(s) - Obsolete Product(s) TDA8133 Power dissipation and layout indications 9/14 5 Power dissipation and layout indications The power is mainly dissipated by the two device buffers. It can be calculated by the equation: P = (VIN1-VO1) x IO1 + (VIN2-VO2) x IO2 The following table lists the different RthJA values of these packages with or without a heat sink and the corresponding maximum power dissipation assuming: ● Maximum ambient temperature = 70° C ● Maximum junction temperature = 140° C Figure 8. Thermal resistance (junction-to-ambient) for DIP16 package without heatsink Figure 9. Metal plate mounted near the TDA8133D for heatsinking Table 5. Power dissipation Device Heat Sink RthJA in °C/W PMAX in W TDA8133 No 50 1.4 Yes 20 3.5 TDA8133D No 56 to 40 1.25 to 1.75 Yes 32 2.2 Copper area (cm²) (35 µm plus solder) board is face-down To optimize the thermal conductivity of the copper layer and the exchanges with the air, the solder must cover the maximum amount of this area 60 40 50 10 12 0 55 45 24 8 6 Test board with “on board” square heat sink area Top View Bottom View |
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