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AP2172A Datasheet(PDF) 4 Page - Diodes Incorporated |
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AP2172A Datasheet(HTML) 4 Page - Diodes Incorporated |
4 / 17 page AP2162A/AP2172A 1.0A DUAL CHANNEL CURRENT-LIMITED POWER SWITCH WITH OUTPUT DISCHARGE AP2162A/2172A Document number: DS32192 Rev. 2 - 2 4 of 17 www.diodes.com October 2010 © Diodes Incorporated Electrical Characteristics (TA = 25 oC, VIN = +5.0V, unless otherwise stated) Symbol Parameter Test Conditions (Note 3) Min Typ. Max Unit VUVLO Input UVLO 1.6 2.0 2.4 V ISHDN Input Shutdown Current Disabled, IOUT= 0 0.1 1 μA IQ Input Quiescent Current, Dual Enabled, IOUT= 0 115 180 μA ILEAK Input Leakage Current Disabled, OUT grounded 1 μA IREV Reverse Leakage Current Disabled, VIN = 0V, VOUT = 5V, IREV at VIN 0.01 0.1 μA RDS(ON) Switch on-resistance VIN = 5V, IOUT = 1A, TA = 25 oC SO-8 90 110 m Ω MSOP-8-EP, DFN3030E-8 85 105 VIN = 5V, IOUT = 1A, -40 oC≤ T A ≤ 85 oC 135 VIN = 3.3V, IOUT = 1A, TA = 25 oC SO-8 110 130 MSOP-8-EP, DFN3030E-8 105 125 VIN = 3.3V, IOUT = 1A, -40 oC≤ T A ≤ 85 oC 170 ILIMIT Over-Load Current Limit VIN = 5V, VOUT = 4V, CL=10μF -40 oC≤ T A ≤ 85 oC 1.1 1.4 1.7 A ILIMIT_G Ganged Over-Load Current Limit VIN = 5V, VOUT = 4.8V, OUT1 & OUT2 tied together, CL=10μF -40 oC≤ T A ≤ 85 oC 2.2 2.8 3.4 A ITrig Current limiting trigger threshold Output Current Slew rate (<100A/s), CL=10μF 1.8 A ITrig_G Ganged current limiting trigger threshold OUT1 & OUT2 tied together, Output Current Slew rate (<100A/s), CL=10μF 3.6 A IOS Short-circuit current per channel OUTx connected to ground, device enabled into short circuit, CL=10μF 1.4 A IOS_G Ganged short-circuit current OUT1 & OUT2 connected to ground, device enabled into short-circuit, CL=10μF 2.2 2.8 3.4 A TSHORT Short-circuit response time VOUT = 0V to IOUT = ILIMIT (output shorted to ground) 2 μs VIL EN Input Logic Low Voltage VIN = 2.7V to 5.5V 0.8 V VIH EN Input Logic High Voltage VIN = 2.7V to 5.5V 2 V ISINK EN Input leakage VEN = 0V to 5.5V 1 μA ILEAK-O Output leakage current Disabled, VOUT = 0V 0.5 1 μA TR Output turn-on rise time CL = 1μF, Rload = 5Ω 0.6 1.5 ms TF Output turn-off fall time CL = 1μF, Rload = 5Ω 0.05 0.3 ms TD(ON) Output turn-on delay time CL = 100μF, Rload = 5Ω 0.2 0.5 ms TD(OFF) Output turn-off delay time CL = 100μF, Rload = 5Ω 0.1 0.3 ms RFLG FLG output FET on-resistance IFLG = 10mA 20 40 Ω IFOH FLG off current VFLG = 5V 0.01 1 μA TBlank FLG blanking time CL=10μF 4 7 15 ms RDIS Discharge resistance (Note 4) VIN = 5V, disabled, IOUT =1mA 100 Ω TSHDN Thermal shutdown threshold Enabled, Rload=1kΩ 140 °C THYS Thermal shutdown hysteresis 25 °C θJA Thermal Resistance Junction-to- Ambient SO-8 (Note 5) 115 oC/W MSOP-8-EP (Note 6) 75 DFN3030E-8 (Note 6) 60 Notes: 3. Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately. 4. The discharge function is active when the device is disabled (when enable is de-asserted or during power-up power-down when VIN < V UVLO). The discharge function offers a resistive discharge path for the external storage capacitor for limited time. 5. Test condition for SO-8: Device mounted on FR-4 substrate PCB with minimum recommended pad layout. 6. Test condition for MSOP-8-EP and DFN3030E-8: Device mounted on 2” x 2” FR-4 substrate PCB,2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground plane. |
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