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TMS320C6A8167 Datasheet(PDF) 8 Page - Texas Instruments |
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TMS320C6A8167 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 280 page  TMS320C6A8168 TMS320C6A8167 SPRS680 – OCTOBER 2010 www.ti.com Table 2-2. Characteristics of the Processor (continued) HARDWARE FEATURES C6A8168/C6A8167 CPU ID + CPU Rev ID Control Status Register (CSR.[31:16]) 0x1003 C674x Megamodule Revision Revision ID Register (MM_REVID[15:0]) 0x0000 JTAG BSDL_ID JTAGID Register 0x0B81 E02F ARM® Cortex™-A8: Up to 1.5 GHz CPU Frequency MHz DSP: Up to 1.5 GHz ARM® Cortex™-A8: 0.67 ns Cycle Time ns DSP: 0.67 ns Core Logic (V) 1.0 V with Required AVS Capability USB Logic (V) 0.9 V Voltage RAM (V) 1.0 V I/O (V) 1.5 V, 1.8 V, 3.3 V Package 25 x 25 mm 1031-Pin BGA (CYG) Process Technology µm 0.04 µm Product Preview (PP), Product Status(1) Advance Information (AI), PP or Production Data (PD) (1) PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 2.3 ARM Subsystem The ARM subsystem is designed to give the ARM Cortex-A8 master control of the device. In general, the ARM Cortex-A8 is responsible for configuration and control of the various subsystem, peripherals, and external memories. The ARM subsystem includes the following features: • ARM Cortex-A8 RISC processor: – ARMv7 ISA plus Thumb®-2, Jazelle-X, and media extensions – NEON floating-point unit – Enhanced memory management unit (MMU) – Little Endian – 32KB L1 instruction cache – 32KB L1 data cache – 256KB L2 cache • Foresight embedded trace module (ETM) • ARM Cortex-A8 interrupt controller (AINTC) • 64KB internal RAM • 48KB internal public ROM. 8 Device Overview Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320C6A8168 TMS320C6A8167 |
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