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LT6202 Datasheet(PDF) 10 Page - Linear Technology |
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LT6202 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 24 page  LTC2380-16 10 238016p OVERVIEW The LTC2380-16 is a low noise, low power, high speed 16-bit successive approximation register (SAR) ADC. Operating from a single 2.5V supply, the LTC2380-16 supports a large and flexible ±VREF fully differential input range with VREF ranging from 2.5V to 5.1V, making it ideal for high performance applications which require a wide dynamic range. The LTC2380-16 achieves ±0.6LSB INL max, no missing codes at 16-bits and 96dB SNR. Fast 2Msps throughput with no cycle latency makes the LTC2380-16 ideally suited for a wide variety of high speed applications. An internal oscillator sets the conversion time, easing external timing considerations. The LTC2380-16 dissipates only 19mW at 2Msps, while an auto power-down feature is provided to further reduce power dissipation during inactive periods. The LTC2380-16 features a unique digital gain compres- sion (DGC) function, which eliminates the driver amplifier’s negative supply while preserving the full resolution of the ADC. When enabled, the ADC performs a digital scaling function that maps zero-scale code from 0V to 0.1 • VREF and full-scale code from VREF to 0.9 • VREF. For a typical reference voltage of 5V, the full-scale input range is now 0.5V to 4.5V, which provides adequate headroom for powering the driving amplifier from a single 5.5V supply. CONVERTER OPERATION The LTC2380-16 operates in two phases. During the ac- quisition phase, the charge redistribution capacitor D/A converter (CDAC) is connected to the IN+ and IN– pins to sample the differential analog input voltage. A rising edge on the CNV pin initiates a conversion. During the conversion phase, the 16-bit CDAC is sequenced through a successive approximation algorithm, effectively comparing the sampled input with binary-weighted fractions of the reference voltage (e.g. VREF/2,VREF/4…VREF/65536)using the differential comparator. At the end of conversion, the CDAC output approximates the sampled analog input. The ADC control logic then prepares the 16-bit digital output code for serial transfer. APPLICATIONS INFORMATION Figure 2. LTC2380-16 Transfer Function INPUT VOLTAGE (V) 0V –1 LSB 238016 F02 011...111 011...110 000...001 000...000 100...000 100...001 111...110 1 LSB BIPOLAR ZERO 111...111 FSR/2 – 1LSB –FSR/2 FSR = +FS – –FS 1LSB = FSR/65536 TRANSFER FUNCTION The LTC2380-16 digitizes the full-scale voltage of 2 × REF into 216 levels, resulting in an LSB size of 152μV with REF = 5V. The ideal transfer function is shown in Figure 2. The output data is in 2’s complement format. RON 40Ω CIN 45pF RON 40Ω REF REF CIN 45pF IN+ IN– BIAS VOLTAGE 238016 F03 Figure 3. The Equivalent Circuit for the Differential Analog Input of the LTC2380-16 ANALOG INPUT The analog inputs of the LTC2380-16 are fully differential in order to maximize the signal swing that can be digitized. The analog inputs can be modeled by the equivalent circuit shown in Figure 3. The diodes at the input provide ESD protection. In the acquisition phase, each input sees ap- proximately 45pF (CIN) from the sampling CDAC in series with 40Ω (RON) from the on-resistance of the sampling switch. Any unwanted signal that is common to both inputs will be reduced by the common mode rejection of the ADC. The inputs draw a current spike while charging the CIN capacitors during acquisition. During conversion, the analog inputs draw only a small leakage current. |
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