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BQ33100PWR Datasheet(PDF) 6 Page - Texas Instruments |
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BQ33100PWR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 56 page  bq33100 SLUS987A – JANUARY 2011 – REVISED MARCH 2011 www.ti.com REG27 LDO Typical values stated where TA = 25°C and VCC = VCC = 14.4V, Min/Max values stated where TA = -40°C to 85°C and VCC = VCC = 3.8V to 25V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VREG Regulator output voltage IREG27 = 10 mA TA = –40°C to 85°C 2.5 2.7 2.75 V VREG27IT– Negative-going POR At REG27 2.22 2.35 2.34 V voltage VREG27IT+ Positive-going POR At REG27 2.25 2.5 2.6 V voltage Regulator output change ΔV(REGTEMP) IREG = 10 mA TA = –40°C to 85°C ±0.5% with temperature ΔV(REGLINE) Line regulation IREG = 10 mA ±2 ±4 mV ΔV(REGLOAD) Load regulation IREG = 0.2 to 10 mA ±20 ±40 mV I(REGMAX) Current limit 25 50 mA COULOMB COUNTER Typical values stated where TA = 25°C and VCC = VCC = 14.4V, Min/Max values stated where TA = -40°C to 85°C and VCC = VCC = 3.8V to 25V (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT Input voltage range -0.20 0.25 V Conversion time Single conversion 250 ms Effective resolution Single conversion 15 Bits Integral nonlinearity TA = –25°C to 85°C ±0.007 ±0.034 %FSR Offset error (1) TA = –25°C to 85°C 10 μV Offset error drift 0.3 0.5 μV/°C Full-scale error(2) –0.8% 0.2% 0.8% Full-scale error drift 150 PPM/ °C Effective input resistance 2.5 M Ω (1) Post Calibration Performance (2) Uncalibrated performance. This gain error can be eliminated with external calibration. ADC Typical values stated where TA = 25°C and VCC = VCC = 14.4V, Min/Max values stated where TA = -40°C to 85°C and VCC = VCC = 3.8V to 25V (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT Input voltage range TS, VC5 –0.2 0.8 ×VREG27 V Conversion time 31.5 ms Resolution (no missing codes) 16 Bits Effective resolution 14 15 Bits Integral nonlinearity ±0.020 %FSR Offset error (1) 70 160 μV Offset error drift 1 μV/°C Full-scale error VIN = 1 V –0.8% ±0.2% 0.4% Full –scale error drift 150 PPM/ °C Effective input resistance 8 M Ω (1) Channel to channel offset 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): bq33100 |
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