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FAN5365 Datasheet(PDF) 8 Page - Fairchild Semiconductor |
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FAN5365 Datasheet(HTML) 8 Page - Fairchild Semiconductor |
8 / 24 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5365 • Rev. 1.0.4 8 I2C Timing Specifications (Continued) Guaranteed by design. Symbol Parameter Conditions Min. Typ. Max. Units tFCL SCL Fall Time Standard Mode 20+0.1CB 300 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB < 100pF 10 40 High-Speed Mode, CB < 400pF 20 80 tRCL1 Rise Time of SCL after a Repeated START Condition and after ACK Bit High-Speed Mode, CB < 100pF 10 80 ns High-Speed Mode, CB < 400pF 20 160 tRDA SDA Rise Time Standard Mode 20+0.1CB 1000 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB < 100pF 10 80 High-Speed Mode, CB < 400pF 20 160 tFDA SDA Fall Time Standard Mode 20+0.1CB 300 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB < 100pF 10 80 High-Speed Mode, CB < 400pF 20 160 tSU;STO Stop Condition Setup Time Standard Mode 4 μs Fast Mode 600 ns Fast Mode Plus 120 ns High-Speed Mode 160 ns CB Capacitive Load for SDA and SCL 400 pF |
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