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other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.

FEATURES 

HIGH INPUT IMPEDANCE 

HIGH GAIN 

gfs = 120µmho MIN 

LOW POWER OPERATION 

ABSOLUTE MAXIMUM RATINGS  

@ 25°C (unless otherwise noted) 

Maximum Temperatures 

Storage Temperature ‐65°C to +150°C 

Operating Junction Temperature 

+150°C 

Maximum Voltage and Current for Each Transistor – Note 1 

Gate Voltage to Drain or Source 

40V 

Drain to Source Voltage 

40V 

Gate Forward Current 

10mA 

Maximum Power Dissipation 

Device Dissipation @ Free Air – Total                 400mW @ +125°C 

MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED

SYMBOL 

CHARACTERISTICS 

VALUE 

UNITS 

CONDITIONS 

DRIFT VS. 

TEMPERATURE 

10 

µV/°C 

OFFSET VOLTAGE 

10 

mV 

ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

SYMBOL 

CHARACTERISTICS 

MIN. 

TYP. 

MAX. 

UNITS 

CONDITIONS 

Breakdown Voltage 

40 

60 

‐‐ 

V 

VDS = 0                  IG =1nA 

Gate‐To‐Gate Breakdown 

40 

‐‐ 

‐‐ 

V 

 

TRANSCONDUCTANCE 

Full Conduction 

 

300 

 

‐‐ 

 

1500 

 

µmho 

 

VDS = 10V         VGS = 0V      f = 1kHz 

Typical Operation 

120 

200 

350 

µmho 

     VDG = 10V          ID = 30µA    f = 1kHz 

 

DRAIN CURRENT 

Full Conduction 

 

60 

 

‐‐ 

 

1000 

 

µA 

 

VDS = 10V              VGS = 0V 

 

GATE VOLTAGE 

Pinchoff voltage 

 

‐‐ 

 

‐‐ 

 

2.0 

 

V 

 

Operating Range 

‐‐ 

‐‐ 

1.8 

V 

 

GATE CURRENT 

Operating 

 

‐‐ 

 

‐‐ 

 

.25 

 

pA 

 

High Temperature 

‐‐ 

‐‐ 

250 

pA 

 

At Full Conduction 

‐‐ 

‐‐ 

1.0 

pA 

High Temperature 

‐‐ 

‐‐ 

1.0 

nA 

 

OUTPUT CONDUCTANCE 

Full Conduction 

 

‐‐ 

 

‐‐ 

 

10 

 

µmho 

 

Operating 

‐‐ 

0.1 

3.0 

 

CMR 

COMMON MODE REJECTION 

 

‐‐ 

 

90 

 

‐‐ 

 

dB 

 

‐‐ 

90 

‐‐ 

 

NF 

NOISE 

Figure 

 

‐‐ 

 

‐‐ 

 

1 

 

dB 

f = 10Hz            

Voltage 

‐‐ 

20 

70 

nV/√Hz 

 

 

‐‐ 

10 

‐‐ 

 

 

CAPACITANCE 

Input 

 

‐‐ 

 

‐‐ 

 

3.0 

 

pF 

 

Reverse Transfer 

‐‐ 

‐‐ 

1.5 

pF  

The LSU424 is a high input impedance Monolithic Dual N-Channel JFET

LSU424

HIGH INPUT IMPEDANCE

MONOLITHIC DUAL

N-CHANNEL JFET

Available Packages:

LSU424 in TO-71 & TO-78

LSU424 in PDIP & SOIC

LSU424 available as bare die

LSU424 Applications:

Ultra Low Input Current Differential Amps

High-Speed Comparators

Impedance Converters

The LSU424 monolithic dual n-channel JFET is

designed to provide very high input impedance for

differential amplification and impedance matching.

Among its many unique features, this series offers

operating gate current specified at -500 fA. The

LSU424 is a direct replacement for discontinued

Siliconix U424.

The hermetically sealed TO-71 & TO-78 packages are

well suited for military applications. The 8 Pin P-DIP

and 8 Pin SOIC provide ease of manufacturing, and the

symmetrical pinout prevents improper orientation.

(See Packaging Information).

Linear Systems replaces discontinued Siliconix U424

TO-71 / TO-78 (Top View)

P-DIP / SOIC (Top View)

Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired