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IMX28AEC Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc

Part No. IMX28AEC
Description  Processors Data Sheet for Automotive Products High assurance boot
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Maker  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
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IMX28AEC Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc

 
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i.MX28 Applications Processors Data Sheet for Automotive Products, Rev. 1
2
Freescale Semiconductor
The i.MX28 can be connected to a variety of external devices such as high-speed USB2.0 OTG, CAN,
10/100 Ethernet, and SD/SDIO/MMC.
1.1
Device Features
The following lists the features of the i.MX28:
ARM926EJ-S CPU running at 454 MHz:
— 16-Kbyte instruction cache and 32-Kbyte data cache
— ARM embedded trace macrocell (CoreSight™ ETM9™)
— Parallel JTAG interface
128 KBytes of integrated low-power on-chip SRAM
128 KBytes of integrated mask-programmable on-chip ROM
1280 bits of on-chip one-time-programmable (OCOTP) ROM
16-bit mobile DDR (mDDR) (1.8 V), DDR2 (1.8 V) and LV-DDR2 (1.5 V), up to 205 MHz DDR
clock frequency with voltage overdrive
Support for up to eight NAND flash memory devices with up to 20-bit BCH ECC
Four synchronous serial ports (SSP) for SDIO/MMC/MS/SPI. Two can be used for
SDIO/MMC/MS interfaces (supports SD2.0, eMMC4.4 and MSPro), and all can be used for the
SPI interface.
10/100-Mbps Ethernet MAC compatible with IEEE Std 802.3™, supporting
IEEE Std 1588™-compatible hardware timestamp. Also supports 50-MHz/25-MHz clock output
for external Ethernet PHY.
Two 2.0B protocol-compatible Controller Area Network (CAN) interfaces
One USB2.0 OTG device/host controller and PHY
One USB2.0 host controller and PHY
LCD controller, up to 24-bit RGB (DOTCK) modes and 24-bit system-mode
Pixel-processing pipeline (PXP) supports full path from color-space conversion, scaling,
alpha-blending to rotation without intermediate memory access.
SPDIF transmitter
Dual serial audio interface (SAIF) to support full-duplex transmit and receive operations; each
SAIF supports three stereo pairs
Five application Universal Asynchronous Receiver-Transmitters (UARTs), up to 3.25 Mbps with
hardware flow control
One debug UART operating at up to 115 Kb/s using programmed I/O
•Two I2C master/slave interfaces, up to 400 kbps
Four 32-bit timers and a rotary decoder
Eight Pulse Width Modulators (PWMs)
Real-time clock (RTC)
GPIO with interrupt capability


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