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I.MX27 Datasheet(PDF) 83 Page - Freescale Semiconductor, Inc

Part # I.MX27
Description  Multimedia Applications Processor Multiple clock and power domains
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

I.MX27 Datasheet(HTML) 83 Page - Freescale Semiconductor, Inc

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i.MX27 and i.MX27L Data Sheet, Rev. 1.7
Freescale Semiconductor
83
Electrical Characteristics
Figure 44. SLCDC Timing Diagram—Parallel Transfers to LCD Device
Table 44. SLCDC Serial Interface Timing Parameters
Symbol
Parameter
Min
Typical
Max
Units
tcss
Chip select setup time
(tcyc / 2) (±) tprop
——
ns
tcsh
Chip select hold time
(tcyc / 2) (±) tprop
——
ns
tcyc
Serial clock cycle time
39 (
±) t
prop
2641
ns
tcl
Serial clock low pulse
18 (
±) t
prop
——
ns
tch
Serial clock high pulse
18 (
±) t
prop
——
ns
tds
Data setup time
(tcyc / 2) (±) tprop
——
ns
tdh
Data hold time
(tcyc / 2) (±) tprop
——
ns
trss
Register select setup time
(15 * tcyc / 2) (±) tprop
——
ns
trsh
Register select hold time
(tcyc / 2) (±) tprop
——
ns
Table 45. SLCDC Parallel Interface Timing Parameters
Symbol
Parameter
Min
Typical
Max
Units
tcyc
Parallel clock cycle time
78 (
±) t
prop
4923
tds
Data setup time
(tcyc / 2) (±) tprop
——
tdh
Data hold time
(tcyc / 2) (±) tprop
——
LCD_CLK
LCD_DATA[15:0]
LCD_RS
command data
LCD_CS
display data
trsh
trss
tds
tdh
tcyc
LCD_CLK
LCD_DATA[15:0]
LCD_RS
command data
LCD_CS
display data
trsh
trss
tds
tdh
tcyc
This diagram illustrates the timing when CSPOL=0
This diagram illustrates the timing when CSPOL=1


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