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TLE6368G1 Datasheet(PDF) 9 Page - Infineon Technologies AG |
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TLE6368G1 Datasheet(HTML) 9 Page - Infineon Technologies AG |
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9 / 59 page  TLE 6368 / SONIC Data Sheet 9 Rev. 2.2, 2006-12-01 the gate driver supply is managed by the combination of internal charge pump, external charge pump and bootstrap capacitor. 2.1.1 Current mode control scheme The regulation loop is located at the left lower corner in the schematic, there you find the voltage feedback amplifier which gives the actual information of the actual output voltage level and the current sense amplifier for the load current information to form finally the regulation signal. To avoid subharmonic oscillations at duty cycles higher than 50% the slope compensation block is necessary. The control signal formed out of those three blocks is finally the input of the PWM regulator for the DMOS gate turn off command, which means this signal determines the duty cycle. The gate turn on signal is set by the oscillator periodically every 3µs which leads to a Buck converter switching frequency around 330kHz. With decreasing input voltage the device changes to the so called pulse skipping mode which means basically that some of the oscillator gate turn off signals are ignored. When the input voltage is still reduced the DMOS is turned on statically (100% duty cycle) and its gate is supplied by the internal charge pump. Below typical 4.5V at the feedback pin the device is turned off.During normal switching operation the gate driver is supplied by the bootstrap capacitor. 2.1.2 Start-up procedure To guarantee a device startup even under full load condition at the linear regulator outputs a special start up procedure is implemented. At first the bootstrap capacitor is charged by the internal charge pump. Afterwards the output capacitor is charged where the driver supply in that case is maintained only by the bootstrap capacitor. Once the output capacitor of the buck converter is charged the external charge pump is activated being able to supply the linear regulators and finally the linear regulators are released to supply the loads. 2.1.3 Reduction of electromagnetic emission In figure 3 it is recognized that two internal DMOS switches are used, a main switch and an auxiliary switch. The second implemented switch is used to adjust the current slope of the switching current. The slope adjustment is done by a controlled charge and discharge of the gate of this DMOS. By choosing the external resistor on the SLEW pin appropriate the current transition time can be adjusted between 20ns and 100ns. 2.1.4 Reducing the switching losses The second purpose of the slope DMOS is to minimise the switching losses. Once being in freewheeling mode of the buck regulator the output voltage level is sufficient to force the load current to flow, the input voltage level is not needed in the first moment. By a feedback network consisting of a resistor and a diode to the boost pin (connection see |
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