MB85RC128

2

DS05–13110–3E

■ PIN ASSIGNMENT

■ PIN FUNCTIONAL DESCRIPTIONS

Pin

Number

Pin Name

Functional Description

1 to 3

A0 to A2

Device Address pins

The MB85RC128 can be connected to the same data bus up to 8 devices.

Device addresses are used in order to identify each of the devices. Connect

these pins to VDD pin or VSS pin externally. Only if the combination of VDD and

VSS pins matches a device, an address and a code inputted from the SDA pin,

the device operates. In the open pin state, A0, A1, and A2 pins are pulled-down

and recognized as “L”.

4

VSS

Ground pin

5SDA

Serial Data I/O pin

This is an I/O pin of serial data for performing bidirectional communication of

address and writing or reading data of FRAM memory cell array. It is an open

drain output that may be wired OR with other open drain or open collector sig-

nals on the bus, so a pull-up resistance is required to be connected to the ex-

ternal circuit.

6SCL

Serial Clock pin

This is a clock input pin for input/output serial data. Data is sampled on the ris-

ing edge of the clock and output on the falling edge.

7WP

Write Protect pin

When Write Protect pin is “H”, writing operation is disabled. When Write Protect

pin is “L”, the entire memory region can be overwritten. Reading operation is al-

ways enabled regardless of the Write Protect pin input level. The Write Protect

pin is pulled down internally to VSS pin, therefore if the Write Protect pin is

open, the pin status is detected as “L” (write enabled).

8

VDD

Supply Voltage pin

VSS

SDA

A1

VDD

SCL

A2

A0

WP

8

7

6

5

4

3

2

1

(TOP VIEW)

(FPT-8P-M02)