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CDB1601-120W Datasheet(PDF) 3 Page - Cirrus Logic |
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CDB1601-120W Datasheet(HTML) 3 Page - Cirrus Logic |
3 / 24 page CDB1601-120W DS931DB3 3 1. INTRODUCTION The CS1601 is a high-performance Variable Frequency Discontinuous Conduction Mode (VF-DCM), ac- tive Power Factor Correction (PFC) controller, optimized to deliver the lowest PFC system cost for elec- tronic ballast applications. The CS1601 uses a digital control algorithm that is optimized for high efficiency and near unity power factor over a wide input voltage range (108-305 VAC). The CS1601 uses an adaptive digital control algorithm. Both the ON time and the switching frequency are varied on a cycle-by-cycle basis over the entire AC line to achieve close to unity power factor. The varia- tion in switching frequency also provides a spread frequency spectrum, thus minimizing the conducted EMI filtering requirements. The feedback loop is closed through an integrated digital control system within the IC. Protection features such as overvoltage, overcurrent, overpower, open circuit, overtemperature, and brownout help protect the device during abnormal transient conditions. Details of these features are provided in the CS1601 data sheet. The CDB1601-120W board demonstrates the performance of the CS1601 over a wide input voltage range of 108 to 305 VAC, typically seen in universal input ballast applications. This board has been designed for a 460 V, 115 W full load output application. Extreme caution needs to be exercised while handling this board. This board is to be powered up by trained professionals only. Prior to applying AC power to the CDB1601-120W board, the CS1601 needs to be biased using an exter- nal 13 VDC power supply, applied across pins 1 and 3 of terminal block J5. Terminal block J6 is used to connect the AC line. The load is connected to J7. As a safety measure, jumper J1 is provided as a means to apply a small resistive load (200 k Ω minium) to rapidly discharge the output capacitors. Other jumpers and test points are provided to evaluate the behavior of the IC and the various sections of the design. Figure 1. Board Connections DANGER High Voltage Hazard ONLY QUALIFIED PERSONNEL SHOULD HANDLE THE CDB1601-120W. WARNING: Heatsinking is required for Q4. The end product should use tar pitch or an equivalent compound for this purpose. For lab evaluation purposes, a fan is recommended to provide adequate cooling. J5 J7 J6 J1 AC Line Input VDD Input Terminals Output |
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