CS1501

DS927PP6

11

follows:

By using digital loop compensation, the voltage feedback

signal does not require an external compensation network.

A current proportional to the AC input voltage is supplied to the

IC on pin IAC and is used by the PFC control algorithm.

Figure 18. IAC Input Pin Model

5.7 Valley Switching

The zero-current detection (ZCD) pin is monitored for

demagnetization in the auxiliary winding of the boost inductor

valley/zero crossings by sensing the voltage transformed onto

Figure 19. ZCD Input Pin Model

The objective of zero-voltage switching is to initiate each

MOSFET switching cycle when its drain-source voltage is at

the lowest possible voltage potential, thus reducing switching

losses. CS1501 uses an auxiliary winding on the PFC boost

inductor to implement zero-voltage switching.

Figure 20. Zero-voltage Switch

During each switching cycle, when the boost diode current

reaches zero, the boost MOSFET drain-source voltage begins

oscillating at the resonant frequency of the boost inductor and

MOSFET parasitic output capacitance. The ZCD_below_zero

signal transitions from high to low just prior to a local minimum

of the MOSFET drain-source voltage oscillation. The

zero-crossing detect circuit ensures that a ZCD_below_zero

pulse will only be generated when the comparator output is

Therefore, any negative edges on the comparator's output

due to spurious glitches will not cause a pulse to be

generated. Due to the CS1501’s variable-frequency control,

the MOSFET switching cycle will not always be initiated at the

first resonant valley.

The external circuitry should be designed so that the current

below depicts approximate values for R3 and R4 for a range

of boost-to-auxiliary inductor turns ratio, N.

Table 1. Aux Inductor Turns Ratio vs. R3 and R4

Equation 6 is used to calculate the cut-off frequency defined

by the RC circuit at the ZCD pin.

where:

frequency

Capacitance at the ZCD pin

–

-----------------------------

–

129mA

-------------------------------

==

[Eq.4]

R1

IA C

VDD

15k

8

CS1501

24k

ADC

R2

3

=

[Eq.5]

R3

ZCD

R4

CS1501

ZCD_below_zero

D2

FE T Drain

N:1

+

-

Demag

Comparator

+

-

5

N~R3

~R4

946k



1.75k



10

42k



1.75k



11

37.5k



1.75k



12

35.5k



1.75k



13

32k



1.75k



14

29.5k



1.75k



15

27.5k



1.75k



ZCD

Zero Crossing

Detection

GD ‘ON’

ZCD_below _zero

12

 R3 R4



C

p





=

[Eq.6]