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LTC6990CS6PBF Datasheet(PDF) 17 Page - Linear Technology

Part No. LTC6990CS6PBF
Description  TimerBlox: Voltage Controlled Silicon Oscillator
Download  28 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC6990CS6PBF Datasheet(HTML) 17 Page - Linear Technology

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LTC6990
17
6990f
Figure 12. VCO Transfer Function
VCTRL (V)
1
100
80
40
20
60
0
2
6990 F12
4
3
APPLICATIONS INFORMATION
The accuracy of KVCO does depend on VSET because the
output frequency is controlled by the ratio of VCTRL to
VSET. The frequency error (in Hertz) due to ΔVSET is ap-
proximated by:
ΔfOUT ≅KVCO •VCTRL
ΔVSET
VSET
As the equation indicates, the potential for error in output
frequency due to VSET error increases with KVCO and is
at its largest when VCTRL is at its maximum. Recall that
when VCTRL is at its maximum, the output frequency is at
its minimum. With the maximum absolute frequency error
(in Hertz) occurring at the lowest output frequency, the
relative frequency error (in percent) can be significant.
VSET is nominally 1.0V with a maximum error of ±30mV
for at most a ±3% error term. However, this ±3% potential
error term is multiplied by both VCTRL and KVCO. Wide fre-
quency range applications (high KVCO) can have frequency
errors greater than ±50% at the highest VCTRL voltage
(lowest fOUT). For this reason the simple, two resistor VCO
circuit must be used with caution for applications where
the frequency range is greater than 4:1. Restricting the
range to 4:1 typically keeps the frequency error due to
VSET variation below 10%.
For wide frequency range applications, the non-inverting
VCO circuit shown in Figure 13 is preferred because the
maximum frequency error occurs when the frequency
is highest, keeping the relative error (in percent) much
smaller.
Example: Design a VCO with the Following Parameters
fOUT(MAX) = 100kHz at VCTRL(MIN) = 1V
fOUT(MIN) = 10kHz at VCTRL(MAX) = 4V
Step 1: Select the NDIV Value
First, choose an NDIV that meets the requirements of
Equation (3a).
6.25 ≤ NDIV ≤ 10
The application’s desired frequency range is 10:1, which
isn’t always possible. However, in this case NDIV = 8 meets
both requirements of Equation (3).
Step 2: Calculate KVCO and f(0V)
Next, calculate the intermediate values KVCO and f(0V) using
Equations (3b) and (3c).
KVCO =
100kHz − 10kHz
4V − 1V
= 30kHz/V
f(0V) =100kHz + 30kHz/V •1V =130kHz
Step 3: Calculate and Select RVCO
The next step is to use Equation (3d) to calculate the cor-
rect value for RVCO.
RVCO =
1MHz • 50k
8•1V • 30kHz/V
= 208.333k
Select RVCO = 210k.
Step 4: Calculate and Select RSET
The final step is to calculate the correct value for RSET
using Equation (3e).
RSET =
1MHz • 50k
8 • 130kHz − 1V • 30kHz/V
(
)
= 62.5k
Select RSET = 61.9k
In this design example, with its wide 10:1 frequency range,
the potential output frequency error due to VSET error alone
ranges from less than ±1% when VCTRL is at its minimum
up to ±36% when VCTRL is at its maximum. This error
must be accounted for in the system design.


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