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MSP430P325 Datasheet(PDF) 3 Page - Texas Instruments

Part # MSP430P325
Description  MIXED SIGNAL MICROCONTROLLER
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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MSP430P325 Datasheet(HTML) 3 Page - Texas Instruments

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MSP430P325
MIXED SIGNAL MICROCONTROLLER
SLAS164A – FEBRUARY 1998 – REVISED MARCH 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AVCC
1
Positive analog supply voltage
AVSS
63
Analog ground reference
A0
61
I
Analog-to-digital converter input port 0 or digital input port 0
A1
62
I
Analog-to-digital converter input port 1 or digital input port 1
A2–A5
5–8
I
Analog-to-digital converter inputs ports 2–5 or digital inputs ports 2–5
CIN
11
I
Input used as enable of counter TPCNT1 – Timer/Port
COM0–3
51–54
O
Common outputs, used for LCD backplanes – LCD
DVCC
2
Positive digital supply voltage
DVSS
64
Digital ground reference
P0.0
18
I/O
General-purpose digital I/O
P0.1/RXD
19
I/O
General-purpose digital I/O, receive digital input port, 8-Bit Timer/Counter
P0.2/TXD
20
I/O
General-purpose digital I/O, transmit data output port, 8-Bit Timer/Counter
P0.3–P0.7
21–25
I/O
Five general-purpose digital I/Os, bit 3 to bit 7
Rext
4
I
Programming resistor input of internal current source
RST/NMI
59
I
Reset input or non-maskable interrupt input
R03
29
I
Input of fourth positive analog LCD level (V4) – LCD
R13
28
I
Input of third positive analog LCD level (V3) – LCD
R23
27
I
Input of second positive analog LCD level (V2) – LCD
R33
26
O
Output of first positive analog LCD level (V1) – LCD
SVCC
3
Switched AVCC to analog-to-digital converter
S0
30
O
Segment line S0 – LCD
S1
31
O
Segment line S1 – LCD
S2–S5/O2–O5
32–35
O
Segment lines S2 to S5 or digital output ports O2–O5, group 1 – LCD
S20/O20/CMPI
50
I/O
Segment line S20 can be used as comparator input port CMPI – Timer/Port
S6–S9/O6–O9
36–39
O
Segment lines S6 to S9 or digital output ports O6–O9, group 2 – LCD
S10–S13/O10–O13
40–43
O
Segment lines S10 to S13 or digital output ports O10–O13, group 3 – LCD
S14–S17/O14–O17
44–47
O
Segment lines S14 to S17 or digital output ports O14 to O17, group 4 – LCD
S18-S19/O18-O19
48, 49
O
Segment lines S18 and S19 or digital output port O18 and O19, group 5 – LCD
TCK
58
I
Test clock, clock input terminal for device programming and test
TDO/TDI
55
I/O
Test data output, data output terminal or data input during programming
TDI/VPP
56
I
Test data input, data input terminal or input of programming voltage
TMS
57
I
Test mode select, input terminal for device programming and test
TP0.0
12
O
General-purpose 3-state digital output port, bit 0 – Timer/Port
TP0.1
13
O
General-purpose 3-state digital output port, bit 1 – Timer/Port
TP0.2
14
O
General-purpose 3-state digital output port, bit 2 – Timer/Port
TP0.3
15
O
General-purpose 3-state digital output port, bit 3 – Timer/Port
TP0.4
16
O
General-purpose 3-state digital output port, bit 4 – Timer/Port
TP0.5
17
I/O
General-purpose digital input/output port, bit 5 – Timer/Port
XBUF
60
O
Clock signal output of system clock MCLK or crystal clock ACLK
Xin
9
I
Input terminal of crystal oscillator
Xout/TCLK
10
I/O
Output terminal of crystal oscillator or test clock input


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