TPS54320

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SLVS982A – AUGUST 2010 – REVISED SEPTEMBER 2010

THERMAL INFORMATION

TPS54320

QFN

UNITS

14 PINS

Junction-to-ambient thermal resistance

47.2

32

Junction-to-case (top) thermal resistance

64.8

Junction-to-board thermal resistance

14.4

°C/W

Junction-to-top characterization parameter

0.5

Junction-to-board characterization parameter

14.7

Junction-to-case (bottom) thermal resistance

3.2

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

distortion starts to substantially increase. Thermal management of the PCB should strive to keep the junction temperature at or below

150°C for best performance and long-term reliability. See power dissipation estimate in application section of this data sheet for more

information.

(3)

Test board conditions:

(a) 2.5 inches × 2.5 inches, 4 layers, thickness: 0.062 inch

(b) 2 oz. copper traces located on the top of the PCB

(c) 2 oz. copper ground planes on the 2 internal layers and bottom layer

(d) 4 0.010 inch thermal vias located under the device package

ELECTRICAL CHARACTERISTICS

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY VOLTAGE (VIN AND PVIN PINS)

PVIN operating input voltage

1.6

17

V

VIN operating input voltage

4.5

17

V

VIN internal UVLO threshold

VIN rising

4.0

4.5

V

VIN internal UVLO hysteresis

150

mV

VIN shutdown supply Current

EN = 0 V

2

5

mA

VIN operating – non switching supply current

VSENSE = 810 mV

600

800

mA

ENABLE AND UVLO (EN PIN)

Enable threshold

Rising

1.21

1.26

V

Enable threshold

Falling

1.10

1.17

V

Input current

EN = 1.1 V

1.15

mA

Hysteresis current

EN = 1.3 V

3.4

mA

VOLTAGE REFERENCE

Voltage reference

0 A

0.792

0.800

0.808

V

MOSFET

BOOT-PH = 3 V

77

116

m

Ω

BOOT-PH = 6 V

57

103

m

Ω

VIN = 12 V

50

87

m

Ω

(1)

Measured at pins

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