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X9258 Datasheet(PDF) 3 Page - Intersil Corporation |
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X9258 Datasheet(HTML) 3 Page - Intersil Corporation |
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3 / 20 page  3 FN8168.5 April 14, 2011 Pinout X9258 (24 LD SOIC, TSSOP) TOP VIEW Pin Descriptions Host Interface Pins SERIAL CLOCK (SCL) The SCL input is used to clock data into and out of the X9258. SERIAL DATA (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire- ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to “Guidelines for Calculating Typical Values of Bus Pull-Up Resistors” on page 10. DEVICE ADDRESS (A0 - A3) The Address inputs are used to set the least significant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9258. A maximum of 16 devices may occupy the 2-wire serial bus. Potentiometer Pins VH/RH (VH0/RH0 - VH3/RH3), VL/RL (VL0/RL0 - VL3/RL3) The VH/RH and VL/RL inputs are equivalent to the terminal connections on either end of a mechanical potentiometer. VW/RW (VW0/RW0 - VW3/RW3) The wiper outputs are equivalent to the wiper output of a mechanical potentiometer. Hardware Write Protect Input (WP) The WP pin when low prevents nonvolatile writes to the Data Registers. Analog Supplies V+, V- The Analog Supplies V+, V- are the supply voltages for the DCP analog section. Pin Names Principles Of Operation The X9258 is a highly integrated microcircuit incorporating four resistor arrays and their associated registers and counters and the serial interface logic providing direct communication between the host and the DCP potentiometers. Serial Interface (2-Wire) The X9258 supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always NC A0 VW3/RW3 V+ VCC VL0/RL0 1 2 3 4 5 6 7 8 9 10 24 23 22 21 20 19 18 17 16 15 A3 SCL VL2/RL2 VH2/RH2 VW2/RW2 V– VSS VW1/RW1 VH1/RH1 VL1/RL1 X9258 VH3/RH3 14 13 11 12 VL3/RL3 VH0/RH0 VW0/RW0 A2 A1 SDA WP SYMBOL DESCRIPTION SCL Serial Clock SDA Serial Data A0 thru A3 Device Address VH0/RH0 thru VH3/RH3, VL0/RL0 thru VL3/RL3 Potentiometer Pins (terminal equivalent) VW0/RW0 thru VW3/RW3 Potentiometers Pins (wiper equivalent) WP Hardware Write Protection V+, V- Analog Supplies VCC System Supply Voltage VSS System Ground NC No Connection (Allowed) X9258 |
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