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ISL28288 Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL28288 Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 17 page ISL28288, ISL28488 11 FN6339.4 July 26, 2011 Applications Information Introduction The ISL28288 and ISL28488 are dual and quad CMOS rail-to-rail input, output (RRIO) micropower operational amplifiers. These devices are designed to operate from a single supply (2.4V to 5.5V) or dual supplies (±1.2V to ±2.75V) while drawing only 60µA of supply current per amplifier. This combination of low power and precision performance makes these devices suitable for solar and battery power applications. Rail-to-Rail Input Many rail-to-rail input stages use two differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this circuit topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. These amplifiers achieve rail-to-rail input operation without sacrificing important precision specifications and degrading distortion performance. The devices’ input offset voltage exhibits a smooth behavior throughout the entire common-mode input range. The input bias current vs the common-mode voltage range gives us an undistorted behavior from typically 100mV below the negative rail and 10% higher than the V+ rail (0.5V higher than V+ when V+ equals 5.5V). Input Protection All input terminals have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. There is an additional pair of back-to-back diodes across the input terminals. For applications where the input differential voltage is expected to Pin Descriptions ISL28288 (8 LD SOIC) ISL28288 (10 LD MSOP) ISL28488 (14 LD TSSOP) ISL28488 (16 LD QSOP) PIN NAME EQUIVALENT CIRCUIT DESCRIPTION 3 1 3 3 IN+_A Circuit 1 Amplifier A non-inverting input -2 - - EN_A Circuit 2 Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. 4 3 11 13 V- Circuit 4 Negative power supply -4 - - EN_B Circuit 2 Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the enabled state. 5 5 5 5 IN+_B Circuit 1 Amplifier B non-inverting input 6 6 6 6 IN-_B Circuit 1 Amplifier B inverting input 7 7 7 7 OUT_B Circuit 3 Amplifier B output 88 4 4 V+ Circuit 4 Positive power supply 1 9 1 1 OUT_A Circuit 3 Amplifier A output 2 10 2 2 IN-_A Circuit 1 Amplifier A inverting input - - 8 10 OUT_C Circuit 3 Amplifier C output - - 9 11 IN-_C Circuit 1 Amplifier C inverting input - - 10 12 IN+_C Circuit 1 Amplifier C non-inverting input - - 12 14 IN+_D Circuit 1 Amplifier D non-inverting input - - 13 15 IN-_D Circuit 1 Amplifier D inverting input - - 14 16 OUT_D Circuit 3 Amplifier D output -- - 8, 9 NC - No internal connection EN V+ V- V+ V- OUT CIRCUIT 3 CIRCUIT 1 CIRCUIT 2 V+ V- CIRCUIT 4 IN- V+ V- IN+ CAPACITIVELY COUPLED |
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