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BD3460FS Datasheet(PDF) 11 Page - Rohm |
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BD3460FS Datasheet(HTML) 11 Page - Rohm |
11 / 29 page Technical Note 11/28 BD3460FS,BD3461FS,BD3464FV,BD3465FV www.rohm.com 2011.04 - Rev.B © 2010 ROHM Co., Ltd. All rights reserved. (2)I 2C BUS FORMAT MSB LSB MSB LSB MSB LSB S Slave Address A Select Address A Data A P 1bit 8bit 1bit 8bit 1bit 8bit 1bit 1bit S = Start conditions (Recognition of start bit) Slave Address = Recognition of slave address. 7 bits in upper order are voluntary. The least significant bit is “L” due to writing. A = ACKNOWLEDGE bit (Recognition of acknowledgement) Select Address = Select every of volume, bass and treble. Data = Data on every volume and tone. P = Stop condition (Recognition of stop bit) (3)I 2C BUS Interface Protocol 1)Basic form S Slave Address A Select Address A Data A P MSB LSB MSB LSB MSB LSB 2)Automatic increment (Select Address increases (+1) according to the number of data. S Slave Address A Select Address A Data1 A Data2 A ・・・・ DataN A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Example) ① Data1 shall be set as data of address specified by Select Address. ② Data2 shall be set as data of address specified by Select Address +1. ③ DataN shall be set as data of address specified by Select Address +N-1. 3)Configuration unavailable for transmission (In this case, only Select Address1 is set. S Slave Address A Select Address1 A Data A Select Address 2 A Data A P MSB LSB MSB LSB MSB LSB MSB LSB MSB LSB (Note)If any data is transmitted as Select Address 2 next to data, it is recognized as data, not as Select Address 2. (4)Slave address Because the slave address can be changed by the setting of CS, it is possible to use two chips at the same time on identical BUS. MSB LSB SEL Voltage Condition A6 A5 A4 A3 A2 A1 A0 R/W GND ~ 0.2×VCC 1 0 0 0 0 0 0 0 0.8×VCC ~ VCC 1 0 0 0 0 1 0 0 Establish the voltage of CS in the condition to have been defined. 80H 84H |
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