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BD8163EFV-E2 Datasheet(PDF) 9 Page - Rohm |
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BD8163EFV-E2 Datasheet(HTML) 9 Page - Rohm |
9 / 22 page Technical Note 9/21 www.rohm.com 2010.12 - Rev.A © 2010 ROHM Co., Ltd. All rights reserved. BD8163EFV ● Block Function ・ Step-up Controller A controller circuit for DC/DC boosting. The switching duty is controlled so that the feedback voltage FB1 is set to 1.24 V (typ.). A soft start operates at the time of starting. Therefore, the switching duty is controlled by the SS pin voltage. ・ Charge Pump Control 1 A controller circuit for the positive-side charge pump. The switching amplitude is controlled so that the feedback voltage FB2 will be set to 1.24 V (typ.). The start delay time can be set in the DLS terminal at the time of starting. When the DLS voltage reaches 0.6 V (Typ.), switching waves will be output from the C1L and C2L pins. ・ Charge Pump Control 2 A controller circuit for the negative-side charge pump. The switching amplitude is controlled so that the feedback voltage FB2 will be set to 0.6 V (Typ.). ・ Gate Shading Controller A controller circuit of gate shading. The Vo2GS and GSOUT are in on/off control according to IG pin input. ・ Regulator Control A regulator controller circuit for VDD voltage generation. The base pin current is controlled so that VDD voltage will be set to 2.5 V (typ.). ・ DET 1 to DET 4 A detection circuit of each output voltage. This detected signal is used for the starting sequential circuit. ・ Start-up Controller A control circuit for the starting sequence. Controls to start in order of VCC VDD Vo1 Vo3 Vo2. ・ VREF A block that generates internal reference voltage. 1.24V (Typ.) is output. ・ TSD/UVLO Thermal shutdown/Under-voltage lockout protection/circuit blocks. The thermal shutdown circuit is shut down at an IC internal temperature of 175℃ and reset at 160℃. The under-voltage lockout protection circuit shuts down the IC when the VCC is 1.8 V (typ.) or below. ・ Starting sequence For malfunction prevention, starting logic control operates so that each output will rise in order of VCCVDD Vo1 Vo3 Vo2. As shown below, detectors DET1 to DET3 detect that the output on the detection side has reached 90% (typ.) of the set voltage, and starts the next block. Starting sequence model Fig. 26 Starting Timing Chart VDD Reg DET1 CTL1 Step up Vo1 DET2 CTL2 Negative Charge Pump Vo3 DET3 CTL3 Positive Charge Pump Vo2 VCC DET4 CLT4 5V 2.5V Vcc VDD Vo2 Vo1 Vo3 0 0 0 |
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