Technical Note

7/14

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2010.09 - Rev.A

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BD9739KN,BD9740KN

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BD9739KN Pin No.

Pin No.

Pin name

Pin No.

Pin name

Pin No.

Pin name

61

VBAT

60

OUT1B

44,36

NON5,7

29

VCC

4,5,12,13

DRAIN2,3H

28

SS1

54

PVCC

6,7,10,11

DRAIN2,3L

25

SS23

14

PVCCH

55

OUT1M

34

RT

59

PVCCL

56

OUT1S

33

CT

8,9,57

PGND23,PGND

35

VREF

32

SCP

42

GND

43

DTC 5

1,64

UDSEL1,5

30

VREGA

26,24,21,47,46,41,39

FB 1～7

15,16,17,18,19,20 STB 1,23,4,5,6,7

51,52,53

OUT4,5,6

27,23,22,48,45,40

INV 1～6

50,2,62

SWIN4,6,7

58

OUT7B

37,38

INV7I,INV7V

31,49,3,63

SWOUT 1,4,6,7

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BD9740KN Pin No.

Pin No.

Pin name

Pin No.

Pin name

Pin No.

Pin name

4

VBAT

44

MAIN2

30,37

NON6,NON7

21

VCC

43

SUB2

17

SS1

46

PVCC

5

OUT1B

23

RT

10

PVCCH

9

DRAIN4H

24

CT

42

PGND

8

DRAIN4L

25

SCP

6,7

PGND4

20

VREF

1

UDSEL12

31

GND

3,38,39

DTC 5～7

2

UDSEL3

22

VREGA

16,18,27,28,32,35,36

FB 1～7

11,12,13,14

STB1,234,56,7

40,41,45,47,48

OUT1,3,5,6,7

15,19,26,29,33,34

INV 1～5,7

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Block diagram explanation and setting peripheral IC components

1. Voltage reference (VREF)

VREF is the reference voltage source of 1.0V output voltage.

Connect a capacitor to prevent oscillation. Set the capacitance from 1.0 μF to 10 μF.

2. REGA

REGA and REGD are regulators with output voltages of 2.5 V. REGA is used as the power supply for the IC's internal

blocks.Connect a capacitor to prevent oscillation. Set the capacitance from 4.7 μ to 10 μF.

3. UDSEL

To enable step-up mode, connect VCC to the UDSEL pin. To enable step-up mode connect 0V to the UDSEL pin.

When using the startup circuit, set the pin to step-up mode. Because the pin uses COMS inverter input, you must connect

the pin to either GND or VCC in order to prevent undefined input.

4. On/off logic

The voltage applied to the STB pins can be controlled whether each channel is on or off.

CH1, CH4, and CH5 can be controlled independently, while CH2 and CH3 can be controlled simultaneously.

Applying a voltage of over 2 V turns on the corresponding channel(s), while leaving the pin open or applying 0 V turns off

the corresponding channel(s).

Turning off all channels causes the IC to be in a standby state.

Each pin is connected to GND by a 400 k

 pull-down resistor.

5. Setting the short protection detection time

The detection time can be set when the capacitor is connected to the SCP pin.

When the detection time is reached, the latch circuit operates, turning off the output for all channels.

To reset the latch circuit, turn all STB pins off, and then back on again.

Detection time (sec) = CSCP

 VTSC / ISCP

(CSCP: capacitance; VTSC: SCP pin detection voltage, ISCP: SCP pin source current)

*Set the capacitor that is connected to the SCP pin from 0.001 μF to 2.2 μF.