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A4490EESTR-T Datasheet(PDF) 4 Page - Allegro MicroSystems |
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A4490EESTR-T Datasheet(HTML) 4 Page - Allegro MicroSystems |
4 / 16 page Triple Output Step-Down Switching Regulator A4490 4 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Terminal List Number Name Function 1 FB1 Feedback REG1 2 VDD Bias supply 3 GND1 Ground 4 FB2 Feedback REG2 5 ENB2 Enable REG2, logic input, active high 6 LX2 Switch node REG2 7 VBB22 Input supply for REG2 8 CPOR POR delay adjustment 9 PORZ Power on reset output, active low 10 VCP Charge pump reservoir 11 CP2 Charge pump capacitor terminal 12 CP1 Charge pump capacitor terminal 13 PGND1 Ground for charge pump circuitry 14 FB3 Feedback REG3 15 ENB3 Enable REG3, logic input, active high 16 LX3 Switch node REG3 17 VBB32 Input supply for REG3 18 VBB12 Input supply for REG1 19 LX1 Switch node REG1 20 ENB1 Enable REG1, logic input, active high –PAD3 Exposed pad for enhanced thermal dissipation 1GND and PGND should be connected externally. 2The three VBBx pins should be connected together externally. 3Thermal pad should be connected to the ground (0 V) plane using thermal vias. PAD 15 14 13 12 11 1 2 3 4 5 ENB3 FB3 PGND CP1 CP2 FB1 VDD GND FB2 ENB2 Pin-out Diagram |
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