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SM5K5 Datasheet(PDF) 11 Page - Sharp Corporation |
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SM5K5 Datasheet(HTML) 11 Page - Sharp Corporation |
11 / 28 page SM5K3/SM5K4/SM5K5 - 11 - The program counter PC specifies the ROM address. The PC consists of 12-bit as shown in Fig. 5 : The upper 6-bit (PU) represents a page while the lower 6-bit (PL) denotes a step. The PU section is a register and the PL section, a binary counter. Execution of interrupt handling and the table reference instruction PAT also automatically uses 1 stage of the stack register SR. Program Memory (ROM) The ROM is used to store the program. The capacity of the ROM is 2 048-step (32-page by 64- step. See Fig. 6). The configuration of the ROM and program jumps are illustrated in Fig. 7. PU Specifies a page (Pages 00H-1FH) Specifies a page (Pages 00H-3FH) PL Program counter PC PU PL Push Pop SR ( level 1 ) SR ( level 2 ) SR ( level 3 ) SR ( level 4 ) MSB LSB Stack register SR Page Step Fig. 6 Page and Step for ROM Fig. 5 Program Counter PC and Stack Register SR Program Counter PC and Stack Register SR |
Similar Part No. - SM5K5 |
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Similar Description - SM5K5 |
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