MC74HCT74A

High–Speed CMOS Logic Data

DL129 — Rev 6

3

MOTOROLA

Symbol

Parameter

Guaranteed Limit

Unit

Symbol

Parameter

– 55 to

25

_C

v 85_C

v 125_C

Unit

fmax

Maximum Clock Frequency (50% Duty Cycle)

(Figures 1 and 4)

30

24

20

MHz

tPLH,

tPHL

Maximum Propagation Delay, Clock to Q or Q

(Figures 1 and 4)

24

30

36

ns

tPLH,

tPHL

Maximum Propagation Delay, Set or Reset to Q or Q

(Figures 2 and 4)

24

30

36

ns

tTLH,

tTHL

Maximum Output Transition Time, Any Output

(Figures 1 and 4)

15

19

22

ns

Cin

Maximum Input Capacitance

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

CPD

Power Dissipation Capacitance (Per Enabled Output)*

Typical @ 25

°C, VCC = 5.0 V

pF

CPD

Power Dissipation Capacitance (Per Enabled Output)*

130

pF

* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

Symbol

Parameter

Fig.

Guaranteed Limit

Units

Symbol

Parameter

Fig.

– 55 to

25

_C

v 85_C

v 125_C

Units

Symbol

Parameter

Fig.

Min

Max

Min

Max

Min

Max

Units

tsu

Minimum Setup Time, Data to Clock

3

15

19

22

ns

th

Minimum Hold Time, Clock to Data

3

3

3

3

ns

trec

Minimum Recovery Time, Set or Reset Inactive to Clock

2

6

8

9

ns

tw

Minimum Pulse Width, Clock

1

15

19

22

ns

tw

Minimum Pulse Width, Set or Reset

2

15

19

22

ns

tr, tf

Maximum Input Rise and Fall Times

1

500

500

500

ns