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GS9001 Datasheet(PDF) 9 Page - Gennum Corporation |
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GS9001 Datasheet(HTML) 9 Page - Gennum Corporation |
9 / 14 page 9 of 14 521 - 38 - 04 NOT RECOMMENDED FOR NEW DESIGNS Word Databits Comments Address B7 B6 B5 B4 B3 B2 B1 B0 1 AP AP AP ANC ANC ANC ANC ANC 15 Error Flags (according to IDH EDA EDH UES IDA IDH EDA EDH SMPTE RPI65) 2 STICKY FF FF FF FF FF AP AP FLAGS UES IDA IDH EDA EDH UES IDA 3 MAP MAP MAP MANC MANC MANC MANC MANC Mask Status for the 15 Error IDH EDA EDH UES IDA IDH EDA EDH Flags (see Note 1) 4 MASK MFF MFF MFF MFF MFF MAP MAP RW UES IDA IDH EDA EDH UES IDA 5 SAP SAP SAP SALL SANC SANC SANC SANC Sensitivity Status for the15 IDH EDA EDH UES IDA IDH EDA EDH Error Flags (see Note 2) 6 AUTO CLR TRS SFF SFF SFF SFF SAP CLR CNT SEL IDA IDH EDA EDH IDA 7 RW1 RW1 0 0 SEL NTSC HD1 D1 Standard Select (see Note 3) b3 b2 STD PAL D1 D2 8 RW2 RW2 RW2 RW2 RW1 RW1 RW1 RW1 Bits 2 to 7 for reserved words b5 b4 b3 b2 b7 b6 b5 b4 1 to 7 Example: Bit number 4 of 9 RW3 RW3 RW3 RW3 RW3 RW3 RW2 RW2 reserved word 2 is b7 b6 b5 b4 b3 b2 b7 b6 denoted as RW2 b4 10 RW5 RW5 RW4 RW4 RW4 RW4 RW4 RW4 b3 b2 b7 b6 b5 b4 b3 b2 11 RW6 RW6 RW6 RW6 RW5 RW5 RW5 RW5 b5 b4 b3 b2 b7 b6 b5 b4 12 RW7 RW7 RW7 RW7 RW7 RW7 RW6 RW6 b7 b6 b5 b4 b3 b2 b7 b6 NOTES: 1. Mask status is used for flag masking. MASK RW is 1 to overwrite Reserved Words. Bit STICKY FLAGS will make the flags sticky. (Flag stays set until read by I 2C interface) 2. Sensitivity status defines the interrupt & error counter sensitivity. Please note for UES flag sensitivity, there is only one bit which is the SALL UES bit. This covers the UES bit for Ancillary, Active Picture and Full Field classes. 3. Bit SEL STD: 1 to overwrite video standard, 0 for auto standard selection Bit NTSC/PAL: 1 for PAL (625/50) standard, 0 for NTSC (525/60) standard Bit HD1/D1: 1 for Component 4:2:2 standard with 18Mhz Luminance, 0 for Component 4:2:2 standard with 13.5 MHz Luminance Bit D1/D2: 1 for 4ƒ sc composite standard, 0 for Component 4:2:2 standard Bit TRS SEL: 1 to force TRS-ID indication in addition to ancillary data indication on the Ancillary Data pin, (pin 35) 0 to force only ancillary indication on the ancillary data pin (pin 35) Bit CLR CNT: 1 to clear the ‘errored field counter’. 0 to let the counter count the errored fields Bit AUTO CLR: 1 to automatically clear the ‘errored field counter’ after every reading of the counter status through the interface, 0 to disable this automatic clear feature Default Status: On power-up all bits are set to zero except for the sensitivity flags which are set to one. Stand-Alone Operation: All bits will stay at power-up initial conditions, as described above, when there is no interface connected to the device, except for the bit TRS-SEL, which can be set to one by connecting the A1and A0 pins to 0,1 respectively. ˇ Table 5. I2C - Interface: Data Format for WRITE 12 Words |
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